PIC18F4539T-E/ML Microchip Technology, PIC18F4539T-E/ML Datasheet - Page 57

IC PIC MCU FLASH 12KX16 44QFN

PIC18F4539T-E/ML

Manufacturer Part Number
PIC18F4539T-E/ML
Description
IC PIC MCU FLASH 12KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4539T-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1408 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1408 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.3
The TBLRD instruction is used to retrieve data from pro-
gram memory and place into data RAM. Table Reads
from program memory are performed one byte at a
time.
FIGURE 5-4:
EXAMPLE 5-1:
 2002 Microchip Technology Inc.
READ_WORD
Reading the FLASH Program
Memory
Instruction Register
MOVLW CODE_ADDR_UPPER
MOVWF TBLPTRU
MOVLW CODE_ADDR_HIGH
MOVWF TBLPTRH
MOVLW CODE_ADDR_LOW
MOVWF TBLPTRL
TBLRD*+
MOVF TABLAT, W
MOVWF WORD_EVEN
TBLRD*+
MOVF TABLAT, W
MOVWF WORD_ODD
(IR)
READS FROM FLASH PROGRAM MEMORY
READING A FLASH PROGRAM MEMORY WORD
(Even Byte Address)
FETCH
Program Memory
Preliminary
; Load TBLPTR with the base
; address of the word
; read into TABLAT and increment
; get data
; read into TABLAT and increment
; get data
(Odd Byte Address)
TBLPTR points to a byte address in program space.
Executing TBLRD places the byte pointed to into
TABLAT. In addition, TBLPTR can be modified
automatically for the next Table Read operation.
The internal program memory is typically organized by
words. The Least Significant bit of the address selects
between the high and low bytes of the word. Figure 5-4
shows the interface between the internal program
memory and the TABLAT.
TBLPTR = xxxxx1
TBLRD
PIC18FXX39
Read Register
TABLAT
TBLPTR = xxxxx0
DS30485A-page 55

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