PIC18F4539T-E/ML Microchip Technology, PIC18F4539T-E/ML Datasheet - Page 318

• Manufacturer Part Number: PIC18F4539T-E/ML
• Description: IC PIC MCU FLASH 12KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4539T-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 24KB (12K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1408 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-QFN
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1408 B
• Interface Type: I2C, SPI, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18FXX39
Timing Requirements
Timing Specifications
TRISE Register
TSTFSZ ............................................................................ 251
Two-Word Instructions
TXSTA Register
U
USART ............................................................................. 165
DS30485A-page 316
A/D Conversion ........................................................ 286
CLKO and I/O ........................................................... 271
Example SPI Mode (Master Mode, CKE = 0) .......... 276
Example SPI Mode (Master Mode, CKE = 1) .......... 277
Example SPI Mode (Slave Mode, CKE = 0) ............ 278
Example SPI Slave Mode (CKE = 1) ....................... 279
External Clock .......................................................... 270
I
Master SSP I
Parallel Slave Port (PIC18F4X39) ............................ 275
PWM ........................................................................ 274
RESET, Watchdog Timer, Oscillator
Timer0 and Timer1 External Clock ........................... 273
USART Synchronous Receive ................................. 284
USART Synchronous Transmission ......................... 284
PLL Clock ................................................................. 270
PSPMODE Bit ...................................................... 91, 96
Example Cases .......................................................... 38
BRGH Bit .................................................................. 168
Asynchronous Mode ................................................ 172
Baud Rate Generator (BRG) .................................... 168
Serial Port Enable (SPEN Bit) .................................. 165
Synchronous Master Mode ...................................... 176
Synchronous Slave Mode ........................................ 179
2
C Bus Data (Slave Mode) ...................................... 281
Start-up Timer, Power-up Timer and
Brown-out Reset Requirements ....................... 272
Associated Registers, Receive ........................ 175
Associated Registers, Transmit ....................... 173
Receiver ........................................................... 174
Transmitter ....................................................... 172
Associated Registers ....................................... 168
Baud Rate Error, Calculating ........................... 168
Baud Rate Formula .......................................... 168
Baud Rates for Asynchronous Mode
Baud Rates for Asynchronous Mode
Baud Rates for Synchronous Mode ................. 169
High Baud Rate Select (BRGH Bit) .................. 168
Sampling .......................................................... 168
Associated Registers, Reception ..................... 178
Associated Registers, Transmit ....................... 176
Reception ......................................................... 178
Transmission .................................................... 176
Associated Registers, Receive ........................ 180
Associated Registers, Transmit ....................... 179
Reception ......................................................... 180
Transmission .................................................... 179
(BRGH = 0) .............................................. 170
(BRGH = 1) .............................................. 171
2
C Bus Data ........................................ 283
Preliminary
W
Wake-up from SLEEP ...............................................195, 205
Watchdog Timer (WDT) ............................................195, 203
WCOL .............................................................................. 153
WCOL Status Flag ............................................153, 155, 158
WWW, On-Line Support ...................................................... 5
X
XORLW ............................................................................ 251
XORWF ........................................................................... 252
Using Interrupts ....................................................... 205
Associated Registers ............................................... 204
Control Register ....................................................... 203
Postscaler .........................................................203, 204
Programming Considerations .................................. 203
RC Oscillator ............................................................ 203
Time-out Period ....................................................... 203
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