PIC18F4539T-E/ML Microchip Technology, PIC18F4539T-E/ML Datasheet - Page 312

• Manufacturer Part Number: PIC18F4539T-E/ML
• Description: IC PIC MCU FLASH 12KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4539T-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 24KB (12K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1408 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-QFN
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1408 B
• Interface Type: I2C, SPI, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18FXX39
C
CALL ................................................................................ 226
Clocking Scheme/Instruction Cycle .................................... 36
CLRF ................................................................................ 227
CLRWDT .......................................................................... 227
Code Examples
Code Protection ............................................................... 195
COMF ............................................................................... 228
Configuration Bits ............................................................. 195
Context Saving During Interrupts ....................................... 81
Conversion Considerations .............................................. 306
CPFSEQ .......................................................................... 228
CPFSGT ........................................................................... 229
CPFSLT ........................................................................... 229
D
Data EEPROM Memory
Data Memory ...................................................................... 39
DAW ................................................................................. 230
DC and AC Characteristics
DC Characteristics ................................................... 261, 264
DCFSNZ ........................................................................... 231
DECF ............................................................................... 230
DECFSZ ........................................................................... 231
Developing Applications ................................................... 121
Development Support ...................................................... 253
Device Differences ........................................................... 305
DS30485A-page 310
16 x 16 Signed Multiply Routine ................................. 68
16 x 16 Unsigned Multiply Routine ............................. 68
8 x 8 Signed Multiply Routine ..................................... 67
8 x 8 Unsigned Multiply Routine ................................. 67
Data EEPROM Read ................................................. 63
Data EEPROM Refresh Routine ................................ 64
Data EEPROM Write .................................................. 63
Erasing a FLASH Program Memory Row .................. 56
How to Clear RAM (Bank 1) Using
Initializing PORTA ...................................................... 83
Initializing PORTB ...................................................... 86
Initializing PORTC ...................................................... 89
Initializing PORTD ...................................................... 91
Initializing PORTE ...................................................... 93
Loading the SSPBUF (SSPSR) Register ................. 128
Motor Control Routine using ProMPT APIs .............. 121
Reading a FLASH Program Memory Word ................ 55
Saving STATUS, WREG and
Writing to FLASH Program Memory ..................... 58–59
Associated Registers ................................................. 65
EEADR Register ........................................................ 61
EECON1 Register ...................................................... 61
EECON2 Register ...................................................... 61
Operation During Code Protect .................................. 64
Protection Against Spurious Write ............................. 64
Reading ...................................................................... 63
Using .......................................................................... 64
Write Verify ................................................................. 64
Writing ........................................................................ 63
General Purpose Registers ........................................ 39
Map for PIC18FX439 ................................................. 40
Map for PIC18FX539 ................................................. 41
Special Function Registers ........................................ 39
Graphs and Tables ................................................... 287
Indirect Addressing ............................................ 47
BSR Registers in RAM ....................................... 81
Preliminary
Device Overview .................................................................. 7
Direct Addressing ............................................................... 48
E
Electrical Characteristics .................................................. 259
Errata ................................................................................... 5
F
Firmware Instructions ....................................................... 211
FLASH Program Memory ................................................... 51
G
GOTO .............................................................................. 232
H
Hardware Interface .......................................................... 113
Hardware Multiplier ............................................................ 67
HS/PLL .............................................................................. 20
I
I/O Ports ............................................................................. 83
I
I
2
2
C Mode
C Mode .......................................................................... 134
Features ....................................................................... 8
Example ..................................................................... 46
Associated Registers ................................................. 59
Control Registers ....................................................... 52
Erase Sequence ........................................................ 56
Erasing ....................................................................... 56
Operation During Code Protection ............................. 59
Reading ..................................................................... 55
TABLAT Register ....................................................... 54
Table Pointer ............................................................. 54
Table Pointer Boundaries .......................................... 54
Table Reads and Table Writes .................................. 51
Writing to .................................................................... 57
Introduction ................................................................ 67
Operation ................................................................... 67
Performance Comparison .......................................... 67
Bus Collision
ACK Pulse ........................................................138, 139
Acknowledge Sequence Timing .............................. 158
Baud Rate Generator ............................................... 151
Bus Collision
Clock Arbitration ...................................................... 152
Clock Stretching ....................................................... 144
Effect of a RESET .................................................... 159
General Call Address Support ................................. 148
Master Mode ............................................................ 149
Multi-Master Communication, Bus Collision
Boundaries Based on Operation ........................ 54
Protection Against Spurious Writes ................... 59
Unexpected Termination .................................... 59
Write Verify ........................................................ 59
During a STOP Condition ................................ 163
Repeated START Condition ............................ 162
START Condition ............................................. 160
Operation ......................................................... 150
Reception ........................................................ 155
Repeated START Condition Timing ................ 154
START Condition Timing ................................. 153
Transmission ................................................... 155
and Arbitration ................................................. 159
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