AT89C51SND1C-7HTUL Atmel, AT89C51SND1C-7HTUL Datasheet - Page 113

• Manufacturer Part Number: AT89C51SND1C-7HTUL
• Description: IC MCU 64KB FLASH MEM 81-CBGA
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51SND1C-7HTUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 44
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 81-CBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

16.2.5
4109L–8051–02/08
Data Packet Format
Table 107. R1 Response Format (Normal Response)
Table 108. R2 Response Format (CID and CSD registers)
Table 109. R3 Response Format (OCR Register)
Table 110. R4 Response Format (Fast I/O)
Table 111. R5 Response Format
There are 2 types of data packets: stream and block. As shown in Figure 16-8, stream data
packets have an indeterminate length while block packets have a fixed length depending on the
block length. Each data packet is preceded by a Start bit: a low level on MCMD line and suc-
ceeded by an End bit: a high level on MCMD line. Due to the fact that there is no predefined end
Bit Position
Bit Position
Width (bits)
Description
Bit Position
Width (bits)
Description
Width (bits)
Description
Bit Position
Description
Width (bits)
Bit Position
Width (bits)
Description
Value
Value
Value
Value
Value
Start bit
Start bit
Start bit
Start bit
47
47
‘0’
‘0’
1
47
‘0’
1
47
‘0’
1
1
Start bit
135
‘0’
1
Transmission bit
Transmission
Transmission
Transmission
46
46
bit
‘0’
‘0’
1
1
Transmission bit
46
bit
‘0’
46
1
‘0’
bit
1
134
‘0’
1
Command
Reserved
Command
Command
‘101000’
‘111111’
[45:40]
‘100111’
[45:40]
[45:40]
Index
45:40
Index
Index
6
6
6
6
-
[133:128]
Reserved
‘111111’
6
OCR register
Card Status
Argument
Argument
[39:8]
[39:8]
[39:8]
39:8
32
32
32
32
-
-
-
-
AT8xC51SND1C
Argument
[127:1]
32
Reserved
‘1111111’
-
CRC7
CRC7
CRC7
[7:1]
[7:1]
[7:1]
7:1
7
7
7
7
-
-
-
End bit
End bit
End bit
End bit
End bit
‘1’
0
1
‘1’
‘1’
‘1’
‘1’
0
1
0
1
0
1
0
1
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