AT89C51SND1C-7HTUL Atmel, AT89C51SND1C-7HTUL Datasheet - Page 64

• Manufacturer Part Number: AT89C51SND1C-7HTUL
• Description: IC MCU 64KB FLASH MEM 81-CBGA
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51SND1C-7HTUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 44
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 81-CBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

13. MP3 Decoder
13.1
13.1.1
Figure 13-1. MP3 Decoder Block Diagram
13.1.2
64
Decoder
Audio Data
CLOCK
From C51
AT8xC51SND1C
MP3
Description
MP3 Data
MP3CON.7
MPEN
8
The AT8xC51SND1C implement a MPEG I/II audio layer 3 decoder better known as MP3
decoder.
In MPEG I (ISO 11172-3) three layers of compression have been standardized supporting three
sampling frequencies: 48, 44.1, and 32 kHz. Among these layers, layer 3 allows highest com-
pression rate of about 12:1 while still maintaining CD audio quality. For example, 3 minutes of
CD audio (16-bit PCM, 44.1 kHz) data, which needs about 32M bytes of storage, can be
encoded into only 2.7M bytes of MPEG I audio layer 3 data.
In MPEG II (ISO 13818-3), three additional sampling frequencies: 24, 22.05, and 16 kHz are
supported for low bit rates applications.
The AT8xC51SND1C can decode in real-time the MPEG I audio layer 3 encoded data into a
PCM audio data, and also supports MPEG II audio layer 3 additional frequencies.
Additional features are supported by the AT8xC51SND1C MP3 decoder such as volume control,
bass, medium, and treble controls, bass boost effect and ancillary data extraction.
The C51 core interfaces to the MP3 decoder through nine special function registers: MP3CON,
the MP3 Control register (see Table 73); MP3STA, the MP3 Status register (see Table 74);
MP3DAT, the MP3 Data register (see Table 75); MP3ANC, the Ancillary Data register (see
Table 77); MP3VOL and MP3VOR, the MP3 Volume Left and Right Control registers (see
Table 78 and Table 79); MP3BAS, MP3MED, and MP3TRE, the MP3 Bass, Medium, and Treble
Control registers (see Table 80, Table 81, and Table 82); and MPCLK, the MP3 Clock Divider
register (see Table 83).
Figure 13-1 shows the MP3 decoder block diagram.
The MP3 decoder does not start any frame decoding before having a complete frame in its input
buffer
MPBBST
MP3CON.6
Frame Buffer
MP3STA1.n
MP3DAT
MPxREQ
1K Bytes
(1)
. In order to manage the load of MP3 data in the frame buffer, a hardware handshake
Anti-Aliasing
MP3VOL
MP3STA.5:3
ERRxxx
MP3VOR
Huffman Decoder
Header Checker
MP3STA.2:1
MPFS1:0
IMDCT
MP3BAS
MP3STA.0
MPVER
MP3MED
Sub-band
Synthesis
Dequantizer
Ancillary Buffer
MP3TRE
MP3ANC
Side Information
16
Stereo Processor
Decoded Data
To Audio Interface
4109L–8051–02/08