AT89C51SND1C-7HTUL Atmel, AT89C51SND1C-7HTUL Datasheet - Page 129

• Manufacturer Part Number: AT89C51SND1C-7HTUL
• Description: IC MCU 64KB FLASH MEM 81-CBGA
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51SND1C-7HTUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 44
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 81-CBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

16.8.0.6
16.8.0.7
16.8.0.8
4109L–8051–02/08
Reset Value = 1111 1111b
Table 119. MMCMD Register
MMCMD (S:DDh) – MMC Command Register
Reset Value = 1111 1111b
Table 120. MMDAT Register
MMDAT (S:DCh) – MMC Data Register
Reset Value = 1111 1111b
Table 121. MMCLK Register
MMCLK (S:EDh) – MMC Clock Divider Register
Number
Number
Number
MMCD7
MC7
MD7
7 - 0
7 - 0
Bit
Bit
Bit
2
1
0
7
7
7
Mnemonic Description
Mnemonic Description
Mnemonic Description
MMCD6
MC7:0
MD7:0
F1FM
F2EM
F1EM
MC6
MD6
Bit
Bit
Bit
6
6
6
FIFO 1 Full Interrupt Mask Bit
Set to prevent F1FI flag from generating an MMC interrupt.
Clear to allow F1FI flag to generate an MMC interrupt.
FIFO 2 Empty Interrupt Mask Bit
Set to prevent F2EI flag from generating an MMC interrupt.
Clear to allow F2EI flag to generate an MMC interrupt.
FIFO 1 Empty Interrupt Mask Bit
Set to prevent F1EI flag from generating an MMC interrupt.
Clear to allow F1EI flag to generate an MMC interrupt.
MMC Command Receive Byte
Output (read) register of the response FIFO.
MMC Command Transmit Byte
Input (write) register of the command FIFO.
MMC Data Byte
Input (write) or output (read) register of the data FIFO.
MMCD5
MC5
MD5
5
5
5
MMCD4
MC4
MD4
4
4
4
MMCD3
MC3
MD3
3
3
3
AT8xC51SND1C
MMCD2
MC2
MD2
2
2
2
MMCD1
MC1
MD1
1
1
1
MMCD0
MC0
MD0
0
0
0
129