LH7A404N0F000B1A Sharp Microelectronics, LH7A404N0F000B1A Datasheet - Page 6

• Manufacturer Part Number: LH7A404N0F000B1A
• Description: IC ARM9 BLUESTREAK MCU 324CABGA
• Manufacturer: Sharp Microelectronics
• Series: BlueStreak ; LH7Ar

Specifications of LH7A404N0F000B1A

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio CODEC, EBI/EMI, IrDA, MMC, SmartCard, SSP, UART/USART, USB
• Peripherals: AC'97, DMA, LCD, POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-CABGA
• For Use With: 568-4304 - BOARD EVAL FOR LH7A404
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 425-2497

LH7A404
6
CABGA
M19
M20
M17
N17
H20
H18
G18
H16
G17
D19
C19
D17
D15
R19
R18
R20
R17
C12
D12
C17
D16
L20
K18
K20
K19
F20
F18
F17
E17
B19
A16
B14
V18
P19
P18
A19
E16
B16
A14
B13
J20
J17
A2/SA0
A3/SA1
A4/SA2
A5/SA3
A6/SA4
A7/SA5
A8/SA6
A9/SA7
A10/SA8
A11/SA9
A12/SA10
A13/SA11
A14/SA12
A15/SA13
A16/SB0
A17/SB1
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
nCS0
nCS1
nCS2
nCS3
nCS6
nCS7
nOE
nWE
nWAIT
nSCS0
nSCS1
nSCS2
nSCS3
nSWE
SCKE0
SCKE1_2
SIGNAL
Asynchronous Address Bus and
Synchronous Address Bus
• Asynchronous Address Bus
• Synchronous Device Bank Address 0
• Asynchronous Address Bus
• Synchronous Device Bank Address 1
Asynchronous Address Bus
Asynchronous Address Bus
Asynchronous Address Bus
Asynchronous Memory Chip Select 0
Asynchronous Memory Chip Select 1
Asynchronous Memory Chip Select 2
Asynchronous Memory Chip Select 3
Asynchronous Memory Chip Select 6
Asynchronous Memory Chip Select 7
Asynchronous Memory Output Enable
Asynchronous Memory Write Enable
Asynchronous Memory Controller Wait
Synchronous Memory Chip Select 0
Synchronous Memory Chip Select 1
Synchronous Memory Chip Select 2
Synchronous Memory Chip Select 3
Synchronous Memory Write Enable
Clock Enable 0 for Synchronous Memory
Clock Enable 1 OR 2 for Synchronous Memory
Table 1. LH7A404 Functional Pin List (Cont’d)
DESCRIPTION
Version 1.0
RESET
STATE
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
LOW
LOW
LOW
LOW
LOW
LOW
Input
No Change
No Change
No Change
No Change
No Change
STANDBY
STATE
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
LOW
LOW
LOW
LOW
LOW
LOW
32-Bit System-on-Chip
OUTPUT
DRIVE
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
12 mA
Data Sheet
I/O NOTES
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
6
6
6
4
4
4
4