ST7FMC2S6TC STMicroelectronics, ST7FMC2S6TC Datasheet - Page 28

• Manufacturer Part Number: ST7FMC2S6TC
• Description: IC MCU 8BIT 32K FLASH 44-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FMC2S6TC

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LINSCI, SPI
• Peripherals: LVD, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-LQFP
• For Use With: 497-8402 - BOARD EVAL COMPLETE INVERTER497-8400 - KIT IGBT PWR MODULE CTRL ST7MC497-6408 - BOARD EVAL BLDC SENSORLESS MOTOR497-4734 - EVAL KIT 3KW POWER DRIVER BOARD497-4733 - EVAL KIT 1KW POWER DRIVER BOARD497-4732 - EVAL KIT 300W POWER DRIVER BOARD497-4731 - EVAL KIT PWR DRIVER CONTROL BRD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

ST7MC1xx/ST7MC2xx
6 SUPPLY, RESET AND CLOCK MANAGEMENT
The device includes a range of utility features for
securing the application in critical situations (for
example in case of a power brown-out), and re-
ducing the number of external components. An
overview is shown in
For more details, refer to dedicated parametric
section.
Figure 13. Clock, Reset and Supply Block Diagram
28/309
1
* It is recommended to decouple the power supply by placing a 0.1µF capacitor as close as possible to V
RESET
OSC2
OSC1
V
V
SS
DD
*
Figure
OSCILLATOR
RESET SEQUENCE
MANAGER
(RSM)
13.
f
OSC
1/2
DIV2 OPT
SICSR, page 0
CLOCK SECURITY SYSTEM
PA
GE
Clock Detector
8Mhz
AVD AVD LVD
IE
Main features
■
■
■
AVD Interrupt Request
– Main supply Low voltage detection (LVD)
– Auxiliary Voltage detector (AVD) with interrupt
– Clock Security System (CSS) with the VCO of
– Clock Detector
– PLL which can be used to multiply the fre-
Reset Sequence Manager (RSM)
1 Crystal/Ceramic resonator oscillator
System Integrity Management (SI)
PLL
AUXILIARY VOLTAGE
Safeosc
F
capability for monitoring the main supply
the PLL, providing a backup safe oscillator
quency by 2 if the clock frequency input is
8MHz
SICSR, page 1
LOW VOLTAGE
SYSTEM
RF
GE
PA
DETECTOR
DETECTOR
(AVD)
(LVD)
0
0
INTEGRITY MANAGEMENT
VCO
CSS
EN
IE
CSS Interrupt Request
16Mhz
lock
CSS
CK
LO
f
D
OSC
WDG
PLL
EN
RF
CKSEL
f
DD
CLK
0
CLOCK (MCC/RTC)
SEL
CK
WITH REALTIME
TIMER (WDG)
CONTROLLER
WATCHDOG
MAIN CLOCK
0
f
f
CPU
MTC