MC68HC908SR12CFA Freescale Semiconductor, MC68HC908SR12CFA Datasheet - Page 113

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MC68HC908SR12CFA

Manufacturer Part Number
MC68HC908SR12CFA
Description
MICROCONTROLLER 48 PIN
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908SR12CFA

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, Temp Sensor
Number Of I /o
31
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
Q1145673

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908SR12CFA
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
8.3 Features
8.4 Functional Description
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
Freescale Semiconductor
Features of the CGM include:
The CGM consists of three major sub-modules:
Figure 8-1
Figure 8-2
Phase-locked loop with output frequency in integer multiples of an
integer dividend of the crystal reference
Low-frequency crystal operation with low-power operation and
high-output frequency resolution
Programmable prescaler for power-of-two increases in frequency
Programmable hardware voltage-controlled oscillator (VCO) for
low-jitter operation
Automatic bandwidth control mode for low-jitter operation
Automatic frequency lock detector
CPU interrupt on entry or exit from locked condition
Configuration register bit to allow oscillator operation during stop
mode
Oscillator module — The oscillator module generates the constant
reference frequency clock, CGMRCLK (buffered CGMXCLK).
Phase-locked loop (PLL) — The PLL generates the
programmable VCO frequency clock, CGMVCLK, and the divided,
CGMPCLK. The CGMVCLK provides the input reference clock to
the PWM and analog modules.
Base clock selector circuit — This software-controlled circuit
selects either CGMXCLK divided by two or the divided VCO clock,
CGMPCLK, divided by two as the base clock, CGMOUT. The SIM
derives the system clocks from either CGMOUT or CGMXCLK.
Clock Generator Module (CGM)
shows the structure of the CGM.
is a summary of the CGM registers.
Clock Generator Module (CGM)
Data Sheet
Features
113

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