MC68HC908SR12CFA Freescale Semiconductor, MC68HC908SR12CFA Datasheet - Page 70

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MC68HC908SR12CFA

Manufacturer Part Number
MC68HC908SR12CFA
Description
MICROCONTROLLER 48 PIN
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908SR12CFA

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, Temp Sensor
Number Of I /o
31
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
Q1145673

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908SR12CFA
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
FLASH Memory
4.8 FLASH Protection
4.8.1 FLASH Block Protect Register
Data Sheet
70
NOTE:
Address:
Due to the ability of the on-board charge pump to erase and program the
FLASH memory in the target application, provision is made to protect
pages of memory from unintentional erase or program operations due to
system malfunction. This protection is done by use of a FLASH block
protect register (FLBPR). The FLBPR determines the range of the
FLASH memory which is to be protected. The range of the protected
area starts from a location defined by FLBPR and ends to the bottom of
the FLASH memory ($FFFF). When the memory is protected, the HVEN
bit cannot be set in either ERASE or PROGRAM operations.
When the FLBPR is cleared (all 0’s), the entire FLASH memory is
protected from being programmed and erased. When all the bits are set,
the entire FLASH memory is accessible for program and erase.
The FLASH block protect register is implemented as an 8-bit I/O register.
The content of this register determine the starting location of the
protected range within the FLASH memory.
BPR[7:0] — FLASH Block Protect Register Bit7 to Bit 0
Reset:
Read:
Write:
Start address of FLASH block protect
BPR[7:1] represent bits [13:7] of a 16-bit memory address. Bits
[15:14] are logic 1s and bits [6:0] are logic 0s.
Figure 4-4. FLASH Block Protect Register (FLBPR)
$FE09
BPR7
Bit 7
0
Figure 4-5. FLASH Block Protect Start Address
BPR6
FLASH Memory
6
0
BPR5
5
0
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
BPR4
4
0
1 1
BPR3
3
0
16-bit memory address
BPR[7:1]
BPR2
Freescale Semiconductor
2
0
0 0 0 0 0 0 0
BPR1
1
0
BPR0
Bit 0
0

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