XC68HC705B32CB Freescale Semiconductor, XC68HC705B32CB Datasheet - Page 41

• Manufacturer Part Number: XC68HC705B32CB
• Description: IC MCU 2.1MHZ 32K OTP 56-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of XC68HC705B32CB

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI
• Peripherals: POR, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 256 x 8
• Ram Size: 528 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 56-SDIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

2.5.9
The RDI pin is the input pin of the SCI receiver.
2.5.10
The TDO pin is the output pin of the SCI transmitter.
2.5.11
The SCLK pin is the clock output pin of the SCI transmitter.
2.5.12
The PLMA pin is the output of pulse length modulation converter A.
2.5.13
The PLMB pin is the output of pulse length modulation converter B.
2.5.14
The VPP1 pin is the output of the charge pump for the EEPROM1 array.
2.5.15
The VRH pin is the positive reference voltage for the A/D converter.
2.5.16
The VRL pin is the negative reference voltage for the A/D converter.
2.5.17
These 24 I/O lines comprise ports A, B and C. The state of any pin is software programmable, and
all the pins are configured as inputs during power-on or reset.
Under software control the PC2 pin can output the internal E-clock (see
2.5.18
This 8-bit input only port (D) shares its pins with the A/D converter. When enabled, the A/D
converter uses pins PD0/AN0 – PD7/AN7 as its analog inputs. On reset, the A/D converter is
disabled which forces the port D pins to be input only port pins (see
MC68HC05B6
Rev. 4.1
RDI (Receive data in)
TDO (Transmit data out)
SCLK
PLMA
PLMB
VPP1
VRH
VRL
PA0 – PA7/PB0 – PB7/PC0 – PC7
PD0/AN0–PD7/AN7
MODES OF OPERATION AND PIN DESCRIPTIONS
Section
Section
8.5).
4.2).
Freescale
2-13
2