XC68HC705B32CB Freescale Semiconductor, XC68HC705B32CB Datasheet - Page 97

• Manufacturer Part Number: XC68HC705B32CB
• Description: IC MCU 2.1MHZ 32K OTP 56-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of XC68HC705B32CB

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI
• Peripherals: POR, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 256 x 8
• Ram Size: 528 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 56-SDIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Note:
7.1
SFA — Slow or fast mode selection for PLMA
This bit allows the user to select the slow or fast mode of the PLMA pulse length modulation
output.
SFB — Slow or fast mode selection for PLMB
This bit allows the user to select the slow or fast mode of the PLMB pulse length modulation
output.
The highest speed of the PLM system corresponds to the frequency of the TOF bit being set,
multiplied by 256. The lowest speed of the PLM system corresponds to the frequency of the TOF
bit being set, multiplied by 16. Because the SFA bit and SFB bit are not double buffered, it is
mandatory to set them to the desired values before writing to the PLM registers; not doing so could
temporarily give incorrect values at the PLM outputs.
SM — Slow mode
MC68HC05B6
Rev. 4.1
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
Miscellaneous
Since the PLM system uses the timer counter, PLM results will be affected while resetting
the timer counter. Both D/A registers are reset to $00 during power-on or external reset.
WAIT mode does not affect the output waveform of the D/A converters.
Miscellaneous register
–
–
–
Slow mode PLMA (4096 x timer clock period).
Fast mode PLMA (256 x timer clock period).
Slow mode PLMB (4096 x timer clock period).
Fast mode PLMB (256 x timer clock period).
The system runs at a bus speed 16 times lower than normal
(f
SCI, A/D and timer.
The system runs at normal bus speed (f
OSC
/32). SLOW mode affects all sections of the device, including
Address
PULSE LENGTH D/A CONVERTERS
$000C
POR
bit 7
INTP
bit 6
INTN
bit 5
INTE
bit 4
OSC
SFA
bit 3
/2).
bit 2
SFB
bit 1
SM
WDOG ?001 000?
bit 0
Freescale
on reset
State
7-3
7