MC908QL4MDT Freescale Semiconductor, MC908QL4MDT Datasheet - Page 31

• Manufacturer Part Number: MC908QL4MDT
• Description: IC MCU 8BIT 4K FLASH 16-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908QL4MDT

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN (Local Interconnect Network)
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Freescale Semiconductor
$004C
$004D
$FE00
$FE01
$FE02
$004A
$004B
$004E
$004F
$0050
$0051
$005F
Addr.
↓
SIM Reset Status Register
Register Name
Break Status Register
SLIC Data Register 6
SLIC Data Register 5
SLIC Data Register 4
SLIC Data Register 3
SLIC Data Register 2
SLIC Data Register 1
SLIC Data Register 0
Register (BRKAR)
Break Auxiliary
See page 149.
See page 149.
See page 149.
See page 149.
See page 149.
See page 149.
See page 149.
See page 191.
See page 131.
See page 191.
Figure 2-2. Control, Status, and Data Registers (Sheet 5 of 7)
Reserved
(SLCD6)
(SLCD5)
(SLCD4)
(SLCD3)
(SLCD2)
(SLCD1)
(SLCD0)
(SRSR)
(BSR)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
POR:
1. Writing a 0 clears SBSW.
Bit 7
POR
R7
R7
R7
R7
R7
R7
R7
T7
T7
T7
T7
T7
T7
T7
R
MC68HC908QL4 Data Sheet, Rev. 8
0
0
0
0
0
0
0
1
0
0
= Unimplemented
PIN
R6
R6
R6
R6
R6
R6
R6
T6
T6
T6
T6
T6
T6
T6
R
6
0
0
0
0
0
0
0
0
0
0
COP
R5
R5
R5
R5
R5
R5
R5
T5
T5
T5
T5
T5
T5
T5
R
5
0
0
0
0
0
0
0
0
0
0
ILOP
R4
R4
R4
R4
R4
R4
R4
T4
T4
T4
T4
T4
T4
T4
R
R
4
0
0
0
0
0
0
0
0
0
0
= Reserved
ILAD
R3
R3
R3
R3
R3
R3
R3
T3
T3
T3
T3
T3
T3
T3
R
3
0
0
0
0
0
0
0
0
0
0
MODRST
U = Unaffected
R2
T2
R2
T2
R2
T2
R2
T2
R2
T2
R2
T2
R2
T2
R
2
0
0
0
0
0
0
0
0
0
0
Direct Page Registers
See note 1
SBSW
LVI
R1
T1
R1
T1
R1
T1
R1
T1
R1
T1
R1
T1
R1
T1
1
0
0
0
0
0
0
0
0
0
0
0
BDCOP
Bit 0
R0
T0
R0
T0
R0
T0
R0
T0
R0
T0
R0
T0
R0
T0
R
0
0
0
0
0
0
0
0
0
0
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