HD6417020SVX12I Renesas Electronics America, HD6417020SVX12I Datasheet - Page 172

• Manufacturer Part Number: HD6417020SVX12I
• Description: IC SUPERH MPU ROMLESS 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7020r

Specifications of HD6417020SVX12I

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 12.5MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

8.6.1
When the multiplexed I/O enable bit (IOE) of the BCR is set to 1, the area 6 space with address bit
A27 as 0 (H'6000000–H'6FFFFFF) becomes an address/data multiplexed I/O space that, when
accessed, multiplexes addresses and data. When the A14 address bit is 0, the bus width is 8 bits
and address output and data input/output are performed from the AD7–AD0 pins. When the A14
address bit is 1, the bus width is 16 bits and address output and data input/output are performed
from the AD15–AD0 pins. In the address/data multiplexed I/O space, access is controlled with the
AH, RD and WR signals. Accesses in the address/data multiplexed I/O space is performed in 4
states, regardless of the WCR settings. Figure 8.32 shows the timing when the address/data
multiplexed I/O space is accessed.
The high-level duty of the RD signal can be selected between 35% and 50% using the RD duty bit
(RDDTY) of the BCR. When RDDTY is 1, the high-level duty is 35% of the T3 or Tw state,
lengthening the access time for external devices.
152 RENESAS
Read
Write
Basic Timing
WRH, WRL
AD15–AD0
AD15–AD0
Figure 8.32 Access Timing For Address/Data Multiplexed I/O Space
A21–A0
RD
CK
CS
AH
T1
Address
Address
T2
T3
Data (input)
Data (output)
T4