HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 626

IC H8 MCU FLASH 128K 100QFP

HD64F3048BF25

Manufacturer Part Number
HD64F3048BF25
Description
IC H8 MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3048BF25

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 18 ROM (H8/3048F-ONE: Single Power Supply, H8/3048B Mask ROM Version)
7. If the mode pins (MD
Notes: 1. The mode pin, FWE pin, and RXD1 pin input must satisfy the mode programming
18.6.2
When set to the user program mode, user’s programming/erasing control program can erase and
program the flash memory. Therefore, on-chip flash memory on-board programming can be
performed by providing a means of controlling FWE and supplying the write data on the board
and providing a programming/erasing program in a part of the program area.
To select this mode, activate H8/3048F-ONE to on-chip flash memory enable modes 5, 6, and 7
and apply a high level to the FWE pin. In this state, the peripheral functions, other than flash
memory, are performed the same as in modes 5, 6, and 7.
Rev. 3.00 Sep 27, 2006 page 598 of 872
REJ09B0325-0300
low level to high level) during a reset (while a low level is being input to the RES pin), since
the microcomputer’s operating mode will change and the state of the address dual port and bus
control output signals (CSn, RD, HWR, LWR) changes, use of these pins as output signals
during reset must be disabled outside the microcomputer.
Do not input low level to the FWE pin while the boot program is executing and when
programming/erasing flash memory *
2. See section 4.2.2, Reset Sequence and 18.11, Notes on Flash Memory
3. For notes on FWE pin High/Low, see section 18.11, Notes on Flash Memory
User Program Mode
setup time (t
Programming/Erasing. The H8/3048F-ONE requires a minimum of 20 system clocks.
Programming/Erasing.
H8/3048F-ONE
Figure 18.10 Recommended System Block Diagram
MDS
2
to MD
) relative to the reset clear timing.
CSn
MD2
MD1
MD0
FWE
RES
0
), FWE pin, and RXD1 pin input levels are changed (e.g., from
3
.
System
control
unit
memory,
External
etc.

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