HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 789

• Manufacturer Part Number: HD64F3048BF25
• Description: IC H8 MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048BF25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

DTCR0B—Data Transfer Control Register 0B
Short address mode
Data transfer enable
Bit
Initial value
Read/Write
0 Data transfer is disabled
1 Data transfer is enabled
Data transfer size
0 Byte-size transfer
1 Word-size transfer
Data transfer increment/decrement
0 Incremented:
1 Decremented:
Repeat enable
RPE
Data transfer interrupt enable
0
1
0 Interrupt requested by DTE bit is disabled
1 Interrupt requested by DTE bit is enabled
Data transfer select
DTS2
Bit 2
An interrupt request is issued to the CPU when the DTE bit = 0
0
1
DTIE
DTE
R/W
0
1
0
1
7
0
DTS1
Bit 1
Description
I/O mode
Repeat mode
Idle mode
0
1
0
1
If DTSZ = 0, MAR is incremented by 1 after each transfer
If DTSZ = 1, MAR is incremented by 2 after each transfer
If DTSZ = 0, MAR is decremented by 1 after each transfer
If DTSZ = 1, MAR is decremented by 2 after each transfer
DTSZ
R/W
DTS0
Bit 0
6
0
0
1
0
1
0
1
0
1
Data Transfer Activation Source
Compare match/input capture A interrupt from ITU channel 0
Compare match/input capture A interrupt from ITU channel 1
Compare match/input capture A interrupt from ITU channel 2
Compare match/input capture A interrupt from ITU channel 3
SCI0 transmit-data-empty interrupt
SCI0 receive-data-full interrupt
Falling edge of
Low level of
DTID
R/W
5
0
RPE
R/W
DREQ
4
0
DREQ
input
Rev. 3.00 Sep 27, 2006 page 761 of 872
DTIE
R/W
input
3
0
Appendix B Internal I/O Register
DTS2
R/W
H'2F
2
0
DTS1
R/W
1
0
REJ09B0325-0300
DTS0
R/W
0
0
DMAC0