MC9S08RD32CFGE Freescale Semiconductor, MC9S08RD32CFGE Datasheet - Page 189

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MC9S08RD32CFGE

Manufacturer Part Number
MC9S08RD32CFGE
Description
IC MCU 32K FLASH 8MHZ 44-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08RD32CFGE

Core Processor
HCS08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08RD32CFGE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
15.2.3
BDC commands are sent serially from a host computer to the BKGD pin of the target HCS08 MCU. All
commands and data are sent MSB-first using a custom BDC communications protocol. Active background
mode commands require that the target MCU is currently in the active background mode while
non-intrusive commands may be issued at any time whether the target MCU is in active background mode
or running a user application program.
Table 15-1
meaning of each command.
Coding Structure Nomenclature
This nomenclature is used in
Freescale Semiconductor
AAAA
WBKP
WD16
RBKP
RD16
WD
RD
CC
SS
d
/
shows all HCS08 BDC commands, a shorthand description of their coding structure, and the
BDC Commands
=
=
=
=
=
=
=
=
=
=
=
Commands begin with an 8-bit hexadecimal command code in the host-to-target
direction (most significant bit first)
separates parts of the command
delay 16 target BDC clock cycles
a 16-bit address in the host-to-target direction
8 bits of read data in the target-to-host direction
8 bits of write data in the host-to-target direction
16 bits of read data in the target-to-host direction
16 bits of write data in the host-to-target direction
the contents of BDCSCR in the target-to-host direction (STATUS)
8 bits of write data for BDCSCR in the host-to-target direction (CONTROL)
16 bits of read data in the target-to-host direction (from BDCBKPT breakpoint
register)
16 bits of write data in the host-to-target direction (for BDCBKPT breakpoint register)
Table 15-1
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
to describe the coding structure of the BDC commands.
Development Support
189

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