MC9S08RD32CFGE Freescale Semiconductor, MC9S08RD32CFGE Datasheet - Page 64

• Manufacturer Part Number: MC9S08RD32CFGE
• Description: IC MCU 32K FLASH 8MHZ 44-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08RD32CFGE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Resets, Interrupts, and System Configuration
5.7
The real-time interrupt function can be used to generate periodic interrupts based on a multiple of the
source clock’s period. The RTI has two source clock choices, the external clock input or the RTI's own
internal clock. The RTI can be used in run, wait, stop2, and stop3 modes. It is not available in stop1 mode.
In run and wait modes, only the external clock can be used as the RTI’s clock source. In stop2 mode, only
the internal RTI clock can be used. In stop3, either the external clock or internal RTI clock can be used.
When using the external oscillator in stop3 mode, it must be enabled in stop (OSCSTEN = 1) and
configured for low bandwidth operation (RANGE = 0).
The SRTISC register includes a read-only status flag, a write-only acknowledge bit, and a 3-bit control
value (RTIS2:RTIS1:RTIS0) used to select one of seven RTI periods. The RTI has a local interrupt enable,
RTIE, to allow masking of the real-time interrupt. The module can be disabled by writing 0:0:0 to
RTIS2:RTIS1:RTIS0 in which case the clock source input is disabled and no interrupts will be generated.
See
information about this register.
5.8
One 8-bit register in the direct page register space and five 8-bit registers in the high-page register space
are related to reset and interrupt systems.
Refer to the direct-page register summary in the
assignments for all registers. This section refers to registers and control bits only by their names. A
Freescale-provided equate or header file is used to translate these names into the appropriate absolute
addresses.
Some control bits in the SOPT and SPMSC2 registers are related to modes of operation. Although brief
descriptions of these bits are provided here, the related functions are discussed in greater detail in
Chapter 3, “Modes of
5.8.1
This direct page register includes two unimplemented bits that always read 0, four read/write bits, one
read-only status bit, and one write-only bit. These bits are used to configure the IRQ function, report status,
and acknowledge IRQ events.
64
Section 5.8.6, “System Real-Time Interrupt Status and Control Register
Real-Time Interrupt (RTI)
Reset, Interrupt, and System Control Registers and Control Bits
Interrupt Pin Request Status and Control Register (IRQSC)
Operation.”
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Memory
chapter of this data sheet for the absolute address
(SRTISC),”
Freescale Semiconductor
for detailed