R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 278

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 6 Instruction Descriptions
6.4.60
Format
SUB
Description
Subtracts general register Rm data from Rn data, and stores the result in Rn. To subtract
immediate data, use ADD #imm,Rn.
Operation
Example:
Rev. 3.00 Jul 08, 2005 page 262 of 484
REJ09B0051-0300
SUB(long m,long n)
{
}
SUB
R[n]-=R[m];
PC+=2;
Rm,Rn
R0,R1 ; Before execution: R0 = H'00000001, R1 = H'80000000
SUB
Binary Subtraction
; After execution:
Abstract
Rn – Rm → Rn
/* SUB Rm,Rn */
SUBtract binary
R1 = H'7FFFFFFF
Code
0011nnnnmmmm1000 1
Arithmetic Instruction
Cycle
T Bit
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