R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 52

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 4 Instruction Features
(11) Absolute Address
When data is accessed by absolute address, the value already in the absolute address is placed in
the memory table. Loading the immediate data when the instruction is executed transfers that
value to the register and the data is accessed in the indirect register addressing mode.
With the SH-2A/SH2A-FPU, when data is referenced using an absolute address not exceeding 28
bits, it is also possible to transfer immediate data located in the instruction code to a register, and
reference the data using register indirect addressing mode. However, when referencing data using
an absolute address of 21 to 28 bits, an OR instruction must be used after the register transfer.
Table 4.5
Type
Up to 20 bits
21 to 28 bits
29 bits or more
(12) 16-Bit/32-Bit Displacement
When data is accessed by 16-bit or 32-bit displacement, the pre-existing displacement value is
placed in the memory table. Loading the immediate data when the instruction is executed transfers
that value to the register and the data is accessed in the indirect indexed register addressing mode.
Table 4.6
Type
16-bit displacement
Rev. 3.00 Jul 08, 2005 page 36 of 484
REJ09B0051-0300
Referencing by Means of Absolute Address
Displacement Accessing
SH-2A/SH2A-FPU CPU
MOVI20 #H'12345, R1
MOV.B
MOVI20S #H'12345, R1
OR
MOV.B
MOV.L
MOV.B
. . . . . . . . . .
.DATA.L H'12345678
SH-2A/SH2A-FPU CPU
MOV.W
MOV.W
.DATA.W H'1234
..................
@R1, R0
#H'67, R1
@R1, R0
@(disp,PC),R1
@R1,R0
@(disp,PC),R0
@(R0,R1),R2
Example for Other CPU
MOV.B @H'12345,R0
MOV.B @H'1234567,R0
MOV.B @H'12345678,R0
Example for Other CPU
MOV.W @(H'1234,R1),R2