AD8370AREZ Analog Devices Inc, AD8370AREZ Datasheet - Page 19

• Manufacturer Part Number: AD8370AREZ
• Description: IC AMP VGA DIFF LN 16TSSOP
• Manufacturer: Analog Devices Inc
• Type: Var Gain Ampr

Specifications of AD8370AREZ

• Amplifier Type: Variable Gain
• Number Of Circuits: 1
• Output Type: Differential
• Slew Rate: 5750 V/ns
• -3db Bandwidth: 750MHz
• Current - Input Bias: 400pA
• Current - Supply: 79mA
• Voltage - Supply, Single/dual (±): 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
• No. Of Amplifiers: 1
• Bandwidth: 750MHz
• No. Of Channels: 1
• Supply Voltage Range: 3V To 5.5V
• Amplifier Case Style: TSSOP
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +85°C
• Number Of Channels: 1
• Number Of Elements: 2
• Power Supply Requirement: Single
• Common Mode Rejection Ratio: 77dB
• Voltage Gain Db: 34dB
• Input Resistance: 0.0002@5VMohm
• Input Bias Current: 0.9@5VnA
• Single Supply Voltage (typ): 5V
• Dual Supply Voltage (typ): Not RequiredV
• Power Dissipation: 575mW
• Rail/rail I/o Type: No
• Single Supply Voltage (min): 3V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: TSSOP EP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output / Channel: -
• Gain Bandwidth Product: -
• Voltage - Input Offset: -
• Lead Free Status / Rohs Status: Compliant

ADC INTERFACING
Although the AD8370 is designed to provide a 100 Ω output
source impedance, the device is capable of driving a variety of
loads while maintaining reasonable gain and distortion
performance. A common application for the AD8370 is ADC
driving in IF sampling receivers and broadband wide dynamic
range digitizers. The wide gain adjustment range allows the use
of lower resolution ADCs. Figure 54 illustrates a typical ADC
interface network.
Many factors need to be considered before defining component
values used in the interface network, such as the desired
frequency range of operation, the input swing, and input
impedance of the ADC. AC coupling capacitors, C
used to block any potential dc offsets present at the AD8370
outputs, which would otherwise consume the available low-end
range of the ADC. The C
so that they present negligible reactance over the intended
frequency range of operation. The VOCM pin may serve as an
external reference for ADCs that do not include an on-board
reference. In either case, it is suggested that the VOCM pin be
decoupled to ground through a moderately large bypassing
capacitor (1 nF to 10 nF) to help minimize wideband noise
pick-up.
AD8370
Figure 53. Normalized Frequency Response of the Two Solutions in
–10
10
–2
–4
–6
–8
V
8
6
4
2
0
OCM
1
10
100
R
R
Figure 54. Generic ADC Interface
OP
OP
Figure 51 and Figure 52
1k
C
C
100Ω
AC
AC
AC
FREQUENCY (Hz)
capacitors should be large enough
10k
Z
Z
S
S
AD8370 WITH
AD8138 SINGLE
+5V SUPPLY
100k
Z
P
1M
AD8370
USING DUAL
±2.5V SUPPLY
R
T
10M
R
R
IP
IP
100M
V
V
IN
IN
AC
, should be
Z
IN
1G
ADC
Rev. A | Page 19 of 28
Often it is wise to include input and output parasitic suppression
resistors, R
prevent resonant effects that occur as a result of internal bond-
wire inductance, pad to substrate capacitance, and stray
capacitance of the printed circuit board trace artwork. If
omitted, undesirable settling characteristics may be observed.
Typically, only 10 Ω to 25 Ω of series resistance is all that is
needed to help dampen resonant effects. Considering that most
ADCs present a relatively high input impedance, very little
signal is lost across the R
Depending on the input impedance presented by the input
system of the ADC, it may be desirable to terminate the ADC
input down to a lower impedance by using a terminating
resistor, R
exhibits greater peaking when driving very light loads. In
addition, the terminating resistor helps to better define the
input impedance at the ADC input. Any part-to-part variability
of ADC input impedance is reduced when shunting down the
ADC inputs by using a moderate tolerance terminating resistor
(typically a 1% value is acceptable).
After defining reasonable values for coupling capacitors,
suppressing resistors, and the terminating resistor, it is time to
design the intermediate filter network. The example in
Figure 54 suggests a second-order, low-pass filter network
comprised of series inductors and a shunt capacitor. The order
and type of filter network used depends on the desired high
frequency rejection required for the ADC interface, as well as
on pass-band ripple and group delay. In some situations, the
signal spectra may already be sufficiently band-limited such
that no additional filter network is necessary, in which case Z
would simply be a short and Z
situations, it may be necessary to have a rather high-order
antialiasing filter to help minimize unwanted high frequency
spectra from being aliased down into the first Nyquist zone of
the ADC.
To properly design the filter network, it is necessary to consider
the overall source and load impedance presented by the AD8370
and ADC input, including the additional resistive contribution
of suppression and terminating resistors. The filter design can
then be handled by using a single-ended equivalent circuit, as
shown in Figure 55. A variety of references that address filter
synthesis are available. Most provide tables for various filter
types and orders, indicating the normalized inductor and
capacitor values for a 1 Hz cutoff frequency and 1 Ω load. After
scaling the normalized prototype element values by the actual
desired cut-off frequency and load impedance, it is simply a
matter of splitting series element reactances in half to realize the
final balanced filter network component values.
T
. The high frequency response of the AD8370
IP
and R
OP
. Parasitic suppressing resistors help to
IP
and R
P
would be an open. In other
OP
series resistors.
AD8370
S