LT3085MPMS8E#TRPBF Linear Technology, LT3085MPMS8E#TRPBF Datasheet - Page 9

IC LDO REG ADJ 500MA 8-MSOP

LT3085MPMS8E#TRPBF

Manufacturer Part Number
LT3085MPMS8E#TRPBF
Description
IC LDO REG ADJ 500MA 8-MSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LT3085MPMS8E#TRPBF

Regulator Topology
Positive Adjustable
Voltage - Output
Adjustable
Voltage - Input
1.2 ~ 36 V
Voltage - Dropout (typical)
1.35V @ 500mA
Number Of Regulators
1
Current - Output
500mA
Current - Limit (min)
500mA
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-MSOP Exposed Pad, 8-HMSOP, 8-eMSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer:
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Quantity:
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APPLICATIONS INFORMATION
The LT3085 can be operated in two modes. Three terminal
mode has the control pin connected to the power input pin
which gives a limitation of 1.35V dropout. Alternatively, the
“control” pin can be tied to a higher voltage and the power
IN pin to a lower voltage giving 275mV dropout on the
IN pin and minimizing the power dissipation. This allows
for a 500mA supply regulating from 2.5V
1.8V
Setting Output Voltage
The LT3085 generates a 10μA reference current that fl ows
out of the SET pin. Connecting a resistor from SET to
ground generates a voltage that becomes the reference
point for the error amplifi er (see Figure 1). The reference
voltage is a straight multiplication of the SET pin current
and the value of the resistor. Any voltage can be generated
and there is no minimum output voltage for the regulator.
Table 1 lists many common output voltages and standard
1% resistor values used to generate that output voltage.
A minimum load current of 1mA is required to maintain
regulation regardless of output voltage. For true zero
voltage output operation, this 1mA load current must be
returned to a negative supply voltage.
IN
V
IN
to 1.2V
+
Figure 1. Basic Adjustable Regulator
+
OUT
V
V
CONTROL
CONTROL
with low dissipation.
V
OUT
IN
= R
SET
SET
R
SET
10μA
• 10μA
LT3085
+
C
SET
IN
to 1.8V
OUT
3085 F01
V
C
OUT
OUT
OUT
or
With the low level current used to generate the reference
voltage, leakage paths to or from the SET pin can create
errors in the reference and output voltages. High quality
insulation should be used (e.g., Tefl on, Kel-F); cleaning
of all insulating surfaces to remove fl uxes and other resi-
dues will probably be required. Surface coating may be
necessary to provide a moisture barrier in high humidity
environments.
Table 1. 1% Resistors for Common Output Voltages
Board leakage can be minimized by encircling the SET
pin and circuitry with a guardring operated at a potential
close to itself; the guardring should be tied to the OUT pin.
Guarding both sides of the circuit board is required. Bulk
leakage reduction depends on the guard ring width. Ten
nanoamperes of leakage into or out of the SET pin and
associated circuitry creates a 0.1% error in the reference
voltage. Leakages of this magnitude, coupled with other
sources of leakage, can cause signifi cant offset voltage and
reference drift, especially over a wide temperature range.
If guardring techniques are used, this bootstraps any
stray capacitance at the SET pin. Since the SET pin is
a high impedance node, unwanted signals may couple
into the SET pin and cause erratic behavior. This will
be most noticeable when operating with minimum
output capacitors at full load current. The easiest way
to remedy this is to bypass the SET pin with a small
amount of capacitance from SET to ground, 10pF to
20pF is suffi cient.
V
1.2V
1.5V
1.8V
2.5V
3.3V
1V
5V
OUT
100k
121k
150k
182k
249k
332k
499k
R
SET
LT3085
3085fb
9

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