ISL9003AIRUCZ-T Intersil, ISL9003AIRUCZ-T Datasheet - Page 12

• Manufacturer Part Number: ISL9003AIRUCZ-T
• Description: IC REG LDO LN 150MA 1.8V 6-UTDFN
• Manufacturer: Intersil

Specifications of ISL9003AIRUCZ-T

• Regulator Topology: Positive Fixed
• Voltage - Output: 1.8V
• Voltage - Input: 2.3 ~ 6.5 V
• Number Of Regulators: 1
• Current - Output: 150mA (Max)
• Current - Limit (min): 175mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 6-µTDFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Dropout (typical): -

Ultra Thin Dual Flat No-Lead Plastic Package (UTDFN)
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
REFERENCE
2X
2X
PIN 1
0.15 C
6X
0.15 C
0.127±0.008
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
0.10 C
0.08 C
0.50
6
1
A1
D2
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
1.00
1.25
TOP VIEW
LAND PATTERN 6
For information regarding Intersil Corporation and its products, see www.intersil.com
E
4
3
BOTTOM VIEW
DETAIL A
0.25
SIDE VIEW
CO.2
1.00 REF
E2
12
4
3
0.45
0.30
e
DETAIL A
1
6
A
1.00
A3
L
0.127 +0.058
TERMINAL THICKNESS
b 6X
B
D
DAP SIZE 1.30 x 0.76
2.00
SEATING
PLANE
C
0.10
-0.008
M
C A B
A1
A
ISL9003A
L6.1.6x1.6A
6 LEAD ULTRA THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
NOTES:
1. Dimensions are in mm. Angles in degrees.
2. Coplanarity applies to the exposed pad as well as the terminals.
3. Warpage shall not exceed 0.10mm.
4. Package length/package width are considered as special
5. JEDEC Reference MO-229.
6. For additional information, to assist with the PCB Land Pattern
SYMBOL
Coplanarity shall not exceed 0.08mm.
characteristics.
Design effort, see Intersil Technical Brief TB389.
A1
A3
D2
E2
A
D
E
b
e
L
0.45
0.15
1.55
0.40
1.55
0.95
0.25
MIN
-
MILLIMETERS
0.127 REF
NOMINAL
0.50 BSC
0.50
0.20
1.60
0.45
1.60
1.00
0.30
-
MAX
0.55
0.05
0.25
1.65
0.50
1.65
1.05
0.35
October 1, 2009
Rev. 1 6/06
NOTES
FN6299.4
4
4
-
-
-
-
-
-
-
-