ISL9003AIRUCZ-T Intersil, ISL9003AIRUCZ-T Datasheet - Page 9

IC REG LDO LN 150MA 1.8V 6-UTDFN

ISL9003AIRUCZ-T

Manufacturer Part Number
ISL9003AIRUCZ-T
Description
IC REG LDO LN 150MA 1.8V 6-UTDFN
Manufacturer
Intersil
Datasheet

Specifications of ISL9003AIRUCZ-T

Regulator Topology
Positive Fixed
Voltage - Output
1.8V
Voltage - Input
2.3 ~ 6.5 V
Number Of Regulators
1
Current - Output
150mA (Max)
Current - Limit (min)
175mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
6-µTDFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Dropout (typical)
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL9003AIRUCZ-T
Manufacturer:
INTERSIL
Quantity:
20 000
Block Diagram
Functional Description
The ISL9003A contains all circuitry required to implement a
high performance LDO. High performance is achieved
through a circuit that delivers fast transient response to
varying load conditions. In a quiescent condition, the
ISL9003A adjusts its biasing to achieve the lowest standby
current consumption.
The device also integrates current limit protection, smart
thermal shutdown protection, and soft-start. Smart Thermal
shutdown protects the device against overheating. Soft-start
minimizes start-up input current surges without causing
excessive device turn-on time.
Power Control
The ISL9003A has an enable pin, (EN), to control power to
the LDO output. When EN is low, the device is in shutdown
mode. In this condition, all on-chip circuits are off, and the
device draws minimum current, typically less than 0.3
When the EN pin goes high, the device first polls the output
of the UVLO detector to ensure that VIN voltage is at least
2.1V (typical). Once verified, the device initiates a start-up
sequence. During the start-up sequence, trim settings are
first read and latched. Then, sequentially, the bandgap,
reference voltage and current generation circuitry turn-on.
Once the references are stable, the LDO powers-up.
During operation, whenever the VIN voltage drops below
about 1.84V, the ISL9003A immediately disables the LDO
output. When VIN rises back above 2.1V (assuming the EN
pin is high), the device re-initiates its start-up sequence and
LDO operation resumes automatically.
GND
V
SD
IN
UVLO
9
CONTROL
LOGIC
BANDGAP AND
TEMPERATURE
SENSOR
µ
THERMAL PROTECTION,
A.
SHORT CIRCUIT,
ISL9003A
SOFT-START
+
-
VOLTAGE AND
GENERATOR
REFERENCE
Reference Generation
The reference generation circuitry includes a trimmed
bandgap, a trimmed voltage reference divider, a trimmed
current reference generator, and an RC noise filter. The filter
includes the external capacitor connected to the CBYP pin.
A 0.01
lowpass filter, and is recommended for most high
performance applications. For the lowest noise application, a
0.1
the reference noise to below the 10Hz to 1kHz frequency
band, which is crucial in many noise-sensitive applications.
The bandgap generates a zero temperature coefficient (TC)
voltage for the regulator reference and other voltage
references required for current generation and
over-temperature detection.
A current generator provides references required for
adaptive biasing as well as references for LDO output
current limit and thermal shutdown determination.
LDO Regulation and Programmable Output Divider
The LDO Regulator is implemented with a high-gain
operational amplifier driving a PMOS pass transistor. The
design of the ISL9003A provides a regulator that has low
quiescent current, fast transient response, and overall
stability across all operating and load current conditions.
LDO stability is guaranteed for a 1µF to 4.7µF output
capacitor that has a tolerance better than 20% and ESR less
than 200m
capacitor. Unless limited by the application, use of an output
capacitor value above 4.7µF is not recommended as LDO
performance improvement is minimal. Soft-start circuitry
integrated into each LDO limits the initial ramp-up rate to
CBYP
µ
F or greater CBYP capacitor should be used. This filters
µ
F capacitor connected CBYP implements a 100Hz
Ω
1.0V
0.94V
0.9V
. The design is performance-optimized for a 1µF
GND
V
O
October 1, 2009
FN6299.4

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