AD9856/PCB Analog Devices Inc, AD9856/PCB Datasheet - Page 23

• Manufacturer Part Number: AD9856/PCB
• Description: BOARD EVAL FOR AD9856
• Manufacturer: Analog Devices Inc
• Type: DDS Modulatorsr

Specifications of AD9856/PCB

• Rohs Status: RoHS non-compliant
• For Use With/related Products: AD9856
• Lead Free Status / RoHS Status: Not Compliant

DIGITAL QUADRATURE MODULATOR
Following the CIC filter stage the I and Q data (which have
been processed independently up to this point) are mixed in the
modulator stage to produce a digital modulated carrier. The
carrier frequency is selected by programming the direct digital
synthesizer (see the Direct Digital Synthesizer Function section)
with the appropriate 32-bit tuning word via the AD9856 control
registers. The DDS simultaneously generates a digital (sampled)
sine and cosine wave at the programmed carrier frequency. The
digital sine and cosine data is multiplied by the Q and I data,
respectively, to create the quadrature components of the
original data upconverted to the carrier frequency. The
quadrature components are digitally summed and passed on to
the subsequent stages.
The key point is that the modulation is done digitally, which
eliminates the phase and gain imbalance and crosstalk issues
typically associated with analog modulators. Note that the
modulated signal is actually a number stream sampled at the
rate of SYSCLK, which is the same rate at which the DAC is
clocked (see Figure 23).
–120
–150
–120
–150
–30
–60
–90
–30
–60
–90
Figure 39. CIC Filter Frequency Response (R = 2, HBF 3 Selected)
Figure 41. CIC Filter Frequency Response (R = 63, HBF 3 Active)
0
0
0
0
DISPLAYED FREQUENCY IS RELATIVE TO I/Q NYQ. BW
DISPLAYED FREQUENCY IS RELATIVE TO I/Q NYQ. BW
144
4
8
288
12
432
16
576
20
720
24
864
2
8
1008
32
Rev. C | Page 23 of 36
Note that the architecture of the quadrature modulator results
in a 3 dB loss of signal level. To visualize this, assume that both
the I data and Q data are fixed at the maximum possible digital
value, x. Then the output of the modulator, y, is:
From this equation, y assumes a maximum value of x√2
(a gain of 3 dB). However, if the same number of bits were
used to represent the y values, as is used to represent the x
values, an overflow would occur. To prevent this, an effective
divide-by-two is implemented on the y values, which reduces
the maximum value of y by a factor of two. Because division by
two results in a 6 dB loss, the modulator yields an overall loss of
3 dB (3 dB − 6 dB = −3 dB, or 3 dB of loss).
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
y = x × cos(ω) + x × sin(ω) = x × [cos(ω) + sin(ω)]
0
0
0
0
Figure 40. Pass-Band Detail (R = 2, HBF 3 Selected)
DISPLAYED FREQUENCY IS RELATIVE TO I/Q NYQ. BW
DISPLAYED FREQUENCY IS RELATIVE TO I/Q NYQ. BW
Figure 42. Pass-Band Detail (R = 63, HBF 3 Active)
0.2
0.2
0.4
0.4
0.6
0.6
0.8
0.8
1.0
1.0
1.2
1.2
1.4
1.4
1.6
1.6
1.8
1.8
2.0
2.0
AD9856