AD9856/PCB Analog Devices Inc, AD9856/PCB Datasheet - Page 6

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AD9856/PCB

Manufacturer Part Number
AD9856/PCB
Description
BOARD EVAL FOR AD9856
Manufacturer
Analog Devices Inc
Type
DDS Modulatorsr
Datasheet

Specifications of AD9856/PCB

Rohs Status
RoHS non-compliant
For Use With/related Products
AD9856
Lead Free Status / RoHS Status
Not Compliant
AD9856
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 3. Pin Function Descriptions
Pin No.
1
2
3
4, 10, 21, 44
5, 11, 20, 43
6 to 9
12 to 16
17
18, 19, 22
23, 28, 31
24
25
26
27
29
30
1
In most cases, optimal performance is achieved with no external connection. For extremely noisy environments, BG REF BYPASS can be bypassed with up to a 0.1 µF
capacitor to AGND (Pin 23). DAC REF BYPASS can be bypassed with up to a 0.1 µF capacitor to AVDD (Pin 27).
Mnemonic
TxENABLE
D11
D10
DVDD
DGND
D9 to D6
D5 to D1
D0
NC
AGND
BG REF
BYPASS
DAC R
DAC REF
BYPASS
AVDD
I
I
OUTB
OUT
SET
Pin Function
Input Pulse that Synchronizes the
Data Stream
Input Data (Most Significant Bit)
Input Data
Digital Supply Voltage
Digital Ground
Input Data
Input Data
Input Data (Least Significant Bit)
No Internal Connection
Analog Ground
No External Connection
R
No External Connection
Analog Supply Voltage
Complementary Analog Current
Output of the DAC
True Analog Current Output of DAC
SET
Resistor Connection
TxENABLE
NC = NO CONNECT
DGND
DGND
DVDD
DVDD
D11
D10
D9
D8
D7
D6
D5
10
11
12
1
2
3
4
5
6
7
8
9
48 47 46 45 44
13 14 15 16 17 18 19 20 21 22 23 24
PIN 1
IDENTIFIER
1
1
Figure 2. Pin Configuration
(Not to Scale)
Rev. C | Page 6 of 36
AD9856
TOP VIEW
43 42 41 40
Pin No.
32
33
34
35
36
37
38
39
40
41
42
45
46
47
48
39 38
37
36
35
34
33
32
31
30
29
28
27
26
25
CA DATA
CA ENABLE
PLL SUPPLY
PLL FILTER
PLL GND
AGND
I
I
AGND
AVDD
DAC REF BYPASS
DAC R
OUT
OUTB
Mnemonic
PLL GND
PLL FILTER
PLL SUPPLY
CA ENABLE
CA DATA
CA CLK
CS
SDO
SDIO
SCLK
SYNC I/O
PS0
PS1
REFCLK
RESET
SET
PLL Loop Filter Connection
Cable Driver Amp Enable
Cable Driver Amp Data
Pin Function
PLL Ground
PLL Voltage Supply
Cable Driver Amp Clock
Chip Select
Serial Data Output
Serial Port I/O
Serial Port Clock
Performs I/O Synchronization
Profile Select 0
Profile Select 1
Reference Clock Input
Master Reset

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