CYWUSB6935-48LFXC Cypress Semiconductor Corp, CYWUSB6935-48LFXC Datasheet - Page 9

• Manufacturer Part Number: CYWUSB6935-48LFXC
• Description: IC USB WIRELESS 2.4GHZ 48VQFN
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYWUSB6935-48LFXC

• Frequency: 2.4GHz
• Data Rate - Maximum: 62.5kbps
• Modulation Or Protocol: DSSS, GFSK
• Applications: AMR, ISM, RKE
• Power - Output: 0dBm
• Sensitivity: -95dBm
• Voltage - Supply: 2.7 V ~ 3.6 V
• Current - Receiving: 57.7mA
• Current - Transmitting: 69.1mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Transmitting Current: 69.1mA
• Data Rate: 62.5Kbps
• Frequency Range: 2.4GHz To 2.483GHz
• Modulation Type: GFSK
• Rf Ic Case Style: QFN
• No. Of Pins: 48
• Supply Voltage Range: 2.7V To 3.6V
• Operating: RoHS Compliant
• Sensitivity Dbm: -95dBm
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-1625

Document 38-16008 Rev. *A
Bit
7
6
5
4
3
2
1
0
Enable
Name
RX Enable
TX Enable
PN Code Select The Pseudo-Noise Code Select bit selects between the upper or lower half of the 64 chips/bit PN code.
Select
Auto Internal PA
Disable
Internal PA
Enable
Reserved
Reserved
Auto Syn Count
RX
7
Addr: 0x03
Enable
Description
The Receive Enable bit is used to place the IC in receive mode.
The Transmit Enable bit is used to place the IC in transmit mode.
This bit applies only when the Code Width bit is set to 32 chips/bit PN codes (Reg 0x04, bit 2=1).
The Auto Synthesizer Count Select bit is used to select the method of determining the settle time of the synthesizer.
The two options are a programmable settle time based on the value in Syn Lock Count register (Reg 0x38), in units
of 2us, or by the auto detection of the synthesizer lock.
It is recommended that the Auto Syn Count Select bit is set to 1 as that guarantees a consistent settle time for the
synthesizer.
The Auto Internal PA Disable bit is used to determine the method of controlling the Internal Power Amplifier. The
two options are automatic control by the baseband or by firmware through register writes. For external PA usage,
please see the description of the REG_ANALOG_CTL register (Reg 0x20).
When this bit is set to 1, the enabled state of the Internal PA is directly controlled by bit Internal PA Enable (Reg
0x03, bit 2). It is recommended that this bit is set to 0, leaving the PA control to the baseband.
The Internal PA Enable bit is used to enable or disable the Internal Power Amplifier.
This bit only applies when the Auto Internal PA Disable bit is selected (Reg 0x03, bit 3=1), otherwise this bit is don’t
care.
This bit is reserved and should be written with a one.
This bit is reserved and should be written with a zero.
TX
1 = Receive Enabled
0 = Receive Disabled
1 = Transmit Enabled
0 = Transmit Disabled
1 = 32 Most Significant Bits of PN code are used
0 = 32 Least Significant Bits of PN code are used
1 = Synthesizer settle time is based on a count in Syn Lock Count register (Reg 0x38)
0 = Synthesizer settle time is based on the internal synthesizer lock signal
1 = Register controlled Internal PA Enable
0 = Auto controlled Internal PA Enable
1 = Internal Power Amplifier Enabled
0 = Internal Power Amplifier Disabled
6
PN Code
Select
5
Count Select
Auto Syn
Figure 7-4. Control
REG_CONTROL
4
Auto Internal PA
Disable
3
Internal PA
Enable
2
Reserved
1
CYWUSB6935
Default: 0x00
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Reserved
0