ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 112

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Registers
112
ATmega128
Figure 46. 16-bit Timer/Counter Block Diagram
Note:
The Timer/Counter (TCNTn), Output Compare Registers (OCRnA/B/C), and Input Capture Reg-
ister (ICRn) are all 16-bit registers. Special procedures must be followed when accessing the 16-
bit registers. These procedures are described in the section
page
CPU access restrictions. Interrupt requests (shorten as Int.Req.) signals are all visible in the
Timer Interrupt Flag Register (TIFR) and Extended Timer Interrupt Flag Register (ETIFR). All
interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK) and Extended
Timer Interrupt Mask Register (ETIMSK). (E)TIFR and (E)TIMSK are not shown in the figure
since these registers are shared by other timer units.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the Tn pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the clock select logic is referred to as the timer clock (clk
The double buffered Output Compare Registers (OCRnA/B/C) are compared with the
Timer/Counter value at all time. The result of the compare can be used by the waveform gener-
ator to generate a PWM or variable frequency output on the Output Compare Pin (OCnA/B/C).
114. The Timer/Counter Control Registers (TCCRnA/B/C) are 8-bit registers and have no
Refer to
and 3 pin placement and description.
Figure 1 on page
Timer/Counter
TCCRxA
OCRxB
OCRxC
OCRxA
TCNTx
ICRx
=
=
=
2,
Direction
Count
Table 30 on page
Clear
Control Logic
TOP
=
TCCRxB
Values
BOTTOM
Fixed
TOP
ICFx (Int.Req.)
TCLK
Detector
73, and
Edge
=
0
Table 39 on page 80
“Accessing 16-bit Registers” on
OCFxA
(Int.Req.)
OCFxB
(Int.Req.)
OCFxC
(Int.Req.)
TOVx
(Int.Req.)
Clock Select
Generation
Generation
Generation
( From Prescaler )
Waveform
Waveform
Waveform
Canceler
TCCRxC
Detector
Noise
Edge
Comparator Ouput )
( From Analog
for Timer/Counter1
OCxA
OCxB
OCxC
2467V–AVR–02/11
ICPx
Tx
T
n
).