T48C862M-R4-TNS Atmel, T48C862M-R4-TNS Datasheet - Page 40

• Manufacturer Part Number: T48C862M-R4-TNS
• Description: IC MON TIRE PRESS 433MHZ 24-SOIC
• Manufacturer: Atmel

Specifications of T48C862M-R4-TNS

• Frequency: 433MHz
• Modulation Or Protocol: FM, FSK
• Data Rate - Maximum: 32 kBaud
• Power - Output: 10dBm
• Current - Transmitting: 9.5mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 1KB EEPROM, 1KB RAM
• Voltage - Supply: 2 V ~ 4 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 24-SOIC (0.200", 5.30mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Applications: -

Timer 1
40
T48C862-R4 [Preliminary]
Figure 33. UTCM Block Diagram
The Timer 1 is an interval timer which can be used to generate periodical interrupts and
as prescaler for Timer 2, Timer 3, the serial interface and the watchdog function.
The Timer 1 consists of a programmable 14-stage divider that is driven by either SUBCL
or SYSCL. The timer output signal can be used as prescaler clock or as SUBCL and as
source for the Timer 1 interrupt. Because of other system requirements, the Timer 1 out-
put T1OUT is synchronized with SYSCL. Therefore, in the power-down mode SLEEP
(CPU core -> sleep and OSC-Stop -> yes), the output T1OUT is stopped (T1OUT = 0).
Nevertheless, the Timer 1 can be active in SLEEP and generate Timer 1 interrupts. The
interrupt is maskable via the T1IM bit and the SUBCL can be bypassed via the T1BP bit
of the T1C2 register. The time interval for the timer output can be programmed via the
Timer 1 control register T1C1.
T3I
T2I
SYSCL
SUBCL
T1OUT
TOG3
POUT
TOG2
from clock module
MUX
MUX
MUX DCG
MUX
MUX
8-bit Counter 3
8-bit shift register
Compare 3/1
Compare 3/2
4-bit Counter 2/1
Transmit buffer
Receive buffer
Capture 3
Compare 2/1
8-bit Counter 2/2
Interval / Prescaler
Timer 1
Timer 3
Timer 2
Compare 2/2
Control
SSI
Watchdog
Control
Demodu-
Control
Modu-
Modu-
lator 3
lator 3
lator 2
SCL
I/O bus
4551C–4BMCU–01/04
NRST
INT2
INT5
INT4
INT3
T3O
T2O
SC
SD