ATSAM3N4AA-MU Atmel, ATSAM3N4AA-MU Datasheet - Page 47

• Manufacturer Part Number: ATSAM3N4AA-MU
• Description: MCU FLASH 48-QFN
• Manufacturer: Atmel
• Series: SAM3Nr

Specifications of ATSAM3N4AA-MU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: SAM3N
• Core: ARM Cortex M3
• Data Bus Width: 10 bit
• Interface Type: SPI, UART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 79
• Operating Supply Voltage: 1.62 V to 3.6 V
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

11.6
11.7
11.8
11011AS–ATARM–04-Oct-10
Pulse Width Modulation Controller (PWM)
10-bit Analog-to-Digital Converter
Digital-to-Analog Converter (DAC)
• Two global registers that act on all three TC Channels
• Quadrature decoder
• 2-bit Gray Up/Down Counter for Stepper Motor
• Four channels, one 16-bit counter per channel
• Common clock generator, providing thirteen different clocks
• Independent channel programming
• Up to 16-channel ADC
• 10-bit 384 Ksamples/sec. or 8-bit 583 Ksamples/sec. Successive Approximation Register
• ±2 LSB Integral Non Linearity, ±1 LSB Differential Non Linearity
• Integrated 8-to-1 multiplexer, offering eight independent 3.3V analog inputs
• External voltage reference for better accuracy on low voltage inputs
• Individual enable and disable of each channel
• Multiple trigger source
• Sleep Mode and conversion sequencer
• 1 channel 10-bit DAC
• Up to 500 ksamples/s conversion rate
• Flexible conversion range
• Multiple trigger sources
• One PDC channel
ADC
– Two multi-purpose input/output signals
– Advanced line filtering
– Position/revolution/speed
– One Modulo n counter providing eleven clocks
– Two independent linear dividers working on modulo n counter outputs
– Independent enable/disable commands
– Independent clock selection
– Independent period and duty cycle, with double buffering
– Programmable selection of the output waveform polarity
– Hardware or software trigger
– External trigger pin
– Timer Counter 0 to 2 outputs TIOA0 to TIOA2 trigger
– Automatic wakeup on trigger and back to sleep mode after conversions of all
enabled channels
SAM3N Summary
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