LC4256V-75TN144C Lattice, LC4256V-75TN144C Datasheet - Page 28

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LC4256V-75TN144C

Manufacturer Part Number
LC4256V-75TN144C
Description
CPLD - Complex Programmable Logic Devices 400MHZ 256 Macrocell 3.3 V 7.5 tPD
Manufacturer
Lattice
Datasheet

Specifications of LC4256V-75TN144C

Memory Type
EEPROM
Number Of Macrocells
256
Number Of Product Terms Per Macro
80
Maximum Operating Frequency
322 MHz
Delay Time
3 ns
Number Of Programmable I/os
48
Operating Supply Voltage
3.3 V
Supply Current
12.5 mA
Maximum Operating Temperature
+ 90 C
Minimum Operating Temperature
0 C
Package / Case
TQFP-144
Mounting Style
SMD/SMT
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
Lattice Semiconductor
ispMACH 4000V/B/C Internal Timing Parameters (Cont.)
t
t
t
Control Delays
t
t
t
t
t
t
Note: Internal Timing Parameters are not tested and are for reference only. Refer to Timing Model in this data sheet for further details.
PDLi
SRi
SRR
BCLK
PTCLK
BSR
PTSR
GPTOE
PTOE
Parameter
Propagation Delay through
Transparent Latch to Output/
Feedback MUX
Asynchronous Reset or Set to
Output/Feedback MUX Delay
Asynchronous Reset or Set
Recovery Time
GLB PT Clock Delay
Macrocell PT Clock Delay
Block PT Set/Reset Delay
Macrocell PT Set/Reset Delay
Global PT OE Delay
Macrocell PT OE Delay
Description
Over Recommended Operating Conditions
0.28
1.67
-2.5
0.25
1.12
0.87
1.83
1.11
2.83
1.83
28
ispMACH 4000V/B/C/Z Family Data Sheet
0.28
1.67
-2.7
0.25
1.12
0.87
1.83
1.41
4.13
2.13
0.28
1.67
-3
0.25
1.12
0.87
1.83
1.51
5.33
2.33
0.28
1.67
-3.5
0.25
1.12
0.87
1.83
1.61
5.33
2.83
Timing v.3.2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns

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