A3PN030-ZQNG68 Actel, A3PN030-ZQNG68 Datasheet - Page 67

FPGA - Field Programmable Gate Array 30K System Gates ProASIC3 nano

A3PN030-ZQNG68

Manufacturer Part Number
A3PN030-ZQNG68
Description
FPGA - Field Programmable Gate Array 30K System Gates ProASIC3 nano
Manufacturer
Actel
Datasheet

Specifications of A3PN030-ZQNG68

Processor Series
A3PN030
Core
IP Core
Number Of Macrocells
256
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
49
Supply Voltage (max)
3.3 V
Supply Current
2 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Development Tools By Supplier
AGLN-Nano-Kit, AGLN-Z-Nano-Kit, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FloasPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
30 K
Package / Case
QFN-68
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A3PN030-ZQNG68I
Manufacturer:
ACT
Quantity:
5
Global Resource Characteristics
Figure 2-23 • Example of Global Tree Use in an A3PN250 Device for Clock Routing
CCC
A3PN250 Clock Tree Topology
Clock delays are device-specific.
global tree presented in
It is used to drive all D-flip-flops in the device.
Figure 2-23
Figure 2-23
is driven by a CCC located on the west side of the A3PN250 device.
R e v i s i o n 8
is an example of a global tree used for clock routing. The
ProASIC3 nano Flash FPGAs
Central
Global Rib
VersaTile
Rows
Global Spine
2- 53

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