XC3S1400AN-4FGG484C Xilinx Inc, XC3S1400AN-4FGG484C Datasheet - Page 15

• Manufacturer Part Number: XC3S1400AN-4FGG484C
• Description: IC FPGA SPARTAN-3AN 484FPGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S1400AN-4FGG484C

• Number Of Logic Elements/cells: 25344
• Number Of Labs/clbs: 2816
• Total Ram Bits: 589824
• Number Of I /o: 372
• Number Of Gates: 1400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-BBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

In-System Flash Memory Architecture
Block Diagram
Flash Memory Array
Spartan-3AN FPGA In-System Flash User Guide
UG333 (v2.1) January 15, 2009
R
The Spartan
reprogrammable Flash memory array and one or two SRAM page buffers, as shown in
Figure
smallest erasable unit is a Page. Page size depends on both the device and the addressing
mode. The one or two SRAM page buffers simplify system interfaces and data
programming. All Spartan-3AN FPGAs, except the XC3S50AN FPGA, have two SRAM
page buffers. The XC3S50AN FPGA has a single such buffer.
All accesses to the ISF from the FPGA application are through a four-wire SPI interface, as
described in
For optimal flexibility, the In-System Flash (ISF) memory is divided into three levels of
granularity, as shown in
XC3S700AN. Other Spartan-3AN FPGA family members are similar but either have a
different number of sectors or a different page size. The number of sectors and page size for
other Spartan-3AN FPGAs is listed in
2-1. The Flash memory array is organized into Pages, Blocks, and Sectors. The
MOSI
MISO
CSB
CLK
®
“SPI_ACCESS Design Primitive,” page
-3AN FPGA In-System Flash (ISF) memory consists of a main nonvolatile,
SPI_ACCESS
Figure 2-1: Internal SPI Flash Block Diagram
Figure
www.xilinx.com
SRAM Page Buffers
2-2.
Figure 2-2
Table 2-1, page
Page Size
264/256 bytes: All but XC3S1400A
528/512 bytes: XC3S1400A
Buffer 2 available in all Spartan-3AN
FPGAs except the XC3S50AN
shows a specific example for the
9.
16.
Flash Memory Array
Chapter 2
UG333_c1_01_020507
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