XC3S1400AN-4FGG484C Xilinx Inc, XC3S1400AN-4FGG484C Datasheet - Page 7

• Manufacturer Part Number: XC3S1400AN-4FGG484C
• Description: IC FPGA SPARTAN-3AN 484FPGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S1400AN-4FGG484C

• Number Of Logic Elements/cells: 25344
• Number Of Labs/clbs: 2816
• Total Ram Bits: 589824
• Number Of I /o: 372
• Number Of Gates: 1400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-BBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Overview and SPI_ACCESS Interface
In-System Flash Summary
Spartan-3AN FPGA In-System Flash User Guide
UG333 (v2.1) January 15, 2009
R
Note:
system Flash after configuration. This user guide is not required for applications that only use the in-
system Flash to configure the FPGA. For Spartan-3AN FPGA configuration information, see
UG332: Spartan-3 Generation Configuration User Guide.
Spartan-3AN FPGAs include abundant In-System Flash (ISF) memory. The ISF memory
array appears to a Spartan-3AN FPGA application as SPI-based serial Flash memory. The
ISF memory is primarily designed to automatically configure the FPGA when power is
applied or whenever the PROG_B pin is pulsed Low. However, the ISF memory array is
large enough to store…
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•
Table 1-1, page 8
remainder of this user guide describes these features and capabilities in greater detail.
The table also summarizes the amount of Flash memory available to the FPGA application,
depending on the number of design options.
•
•
two complete, uncompressed FPGA configuration bitstreams. Using the MultiBoot
feature, the FPGA application can selectively choose between the two designs or
reserve one image as a fail-safe image for live in-system Flash updates.
additional nonvolatile data for the FPGA application, such as MicroBlaze™ processor
code, serial numbers, Ethernet MAC IDs, graphic images, message templates, and so
on.
How many FPGA configuration bitstreams are stored in the ISF array?
♦
♦
Does the FPGA application use the ISF memory’s Sector Protect or Sector Lockdown
features to protect ISF memory contents?
♦
♦
This user guide only applies to Spartan
Most applications store a single FPGA configuration bitstream, leaving the
remaining space for nonvolatile user data.
Optionally, each Spartan-3AN FPGA can store two uncompressed MultiBoot
configuration images, which reduces the amount of Flash memory available to
the application.
Without using the sector-based data protection features, user application data can
be stored in the next available page location following the FPGA bitstream (page
aligned).
If the application uses the sector-based data protection features, then user
application data is typically aligned to the next sector boundary (sector aligned).
summarizes the key attributes and capabilities of the ISF memory. The
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®
-3AN FPGA designs that access or modify the in-
Chapter 1
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