74LVC2T45DC,125 NXP Semiconductors, 74LVC2T45DC,125 Datasheet - Page 25
74LVC2T45DC,125
Manufacturer Part Number
74LVC2T45DC,125
Description
TXRX TRANSLATING 3ST 8VSSOP
Manufacturer
NXP Semiconductors
Datasheet
1.74LVC2T45GD125.pdf
(36 pages)
Specifications of 74LVC2T45DC,125
Logic Family
74LVC
Number Of Channels Per Chip
2
Propagation Delay Time
15.2 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 125 C
Package / Case
VSSOP-8
Maximum Power Dissipation
250 mW
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5479-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
74LVC2T45DC,125
Manufacturer:
SIEMENS
Quantity:
77
NXP Semiconductors
74LVC_LVCH2T45
Product data sheet
14.4 Enable times
Calculate the enable times for the 74LVC2T45; 74LVCH2T45 using the following
formulas:
In a bidirectional application, these enable times provide the maximum delay from the
time the DIR bit is switched until an output is expected. For example, if the 74LVC2T45;
74LVCH2T45 initially is transmitting from A to B, then the DIR bit is switched, the B port of
the device must be disabled before presenting it with an input. After the B port has been
disabled, an input signal applied to it appears on the corresponding A port after the
specified propagation delay.
•
•
•
•
t
t
t
t
PZH
PZL
PZH
PZL
(DIR to A) = t
(DIR to B) = t
(DIR to A) = t
(DIR to B) = t
All information provided in this document is subject to legal disclaimers.
PHZ
PHZ
PLZ
PLZ
Rev. 4 — 20 August 2010
(DIR to B) + t
(DIR to B) + t
(DIR to A) + t
(DIR to A) + t
74LVC2T45; 74LVCH2T45
PLH
PHL
PLH
PHL
(B to A)
(B to A)
(A to B)
(A to B)
Dual supply translating transceiver; 3-state
© NXP B.V. 2010. All rights reserved.
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