PCF85176T/1,118 NXP Semiconductors, PCF85176T/1,118 Datasheet - Page 32

• Manufacturer Part Number: PCF85176T/1,118
• Description: IC LCD DISPLAY DVR 40SEG 56TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCF85176T/1,118

• Package / Case: 56-TFSOP (0.240", 6.10mm Width)
• Display Type: LCD
• Configuration: 40 Segment
• Interface: I²C
• Current - Supply: 20µA
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Digits: 20
• Number Of Segments: 40
• Maximum Clock Frequency: 2640 Hz
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Power Dissipation: 400 mW
• Maximum Operating Temperature: + 95 C
• Attached Touch Screen: No
• Maximum Supply Current: 20 uA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Digits Or Characters: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-5933-2; PCF85176T/1,118

NXP Semiconductors
PCF85176_1
Product data sheet
The SYNC line is provided to maintain the correct synchronization between all cascaded
PCF85176. Synchronization is guaranteed after a power-on reset. The only time that
SYNC is likely to be needed is if synchronization is accidentally lost (e.g. by noise in
adverse electrical environments or by defining a multiplex drive mode when PCF85176
with different SA0 levels are cascaded).
SYNC is organized as an input/output pin. The output selection is realized as an
open-drain driver with an internal pull-up resistor. A PCF85176 asserts the SYNC line at
the onset of its last active backplane signal and monitors the SYNC line at all other times.
If synchronization in the cascade is lost, it is restored by the first PCF85176 to assert
SYNC. The timing relationship between the backplane waveforms and the SYNC signal
for the various drive modes of the PCF85176 are shown in
The contact resistance between the SYNC on each cascaded device must be controlled.
If the resistance is too high, the device is not able to synchronize properly; this is
particularly applicable to chip-on-glass applications. The maximum SYNC contact
resistance allowed for the number of devices in cascade is given in
Fig 23. Cascaded PCF85176 configuration
V
V
V
SS
DD
CONTROLLER
PROCESSOR/
LCD
(1) Is master (OSC connected to V
(2) Is slave (OSC connected to V
MICRO-
MICRO-
HOST
R
≤
All information provided in this document is subject to legal disclaimers.
2C
t
r
b
Rev. 01 — 14 April 2010
DD
SS
).
SYNC
SYNC
).
OSC
SDA
SCL
CLK
OSC
SDA
CLK
SCL
A0
Universal LCD driver for low multiplex rates
A0
A1
PCF85176
PCF85176
V DD
V
A1
DD
A2
(1)
(2)
A2 SA0
V LCD
SA0
V
LCD
V
SS
V
Figure
SS
40 segment drives
40 segment drives
4 backplanes
BP0 to BP3
BP0 to BP3
(open-circuit)
24.
Table
PCF85176
© NXP B.V. 2010. All rights reserved.
19.
LCD PANEL
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