ISL62882HRTZ Intersil, ISL62882HRTZ Datasheet

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ISL62882HRTZ

Manufacturer Part Number
ISL62882HRTZ
Description
IC REG PWM 2PHASE BUCK 40TQFN
Manufacturer
Intersil
Datasheet

Specifications of ISL62882HRTZ

Applications
Controller, Intel IMVP-6.5™
Voltage - Input
5 V ~ 25 V
Number Of Outputs
1
Voltage - Output
0.0125 V ~ 1.5 V
Operating Temperature
-10°C ~ 100°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Multiphase PWM Regulator for IMVP-6.5™ Mobile
CPUs and GPUs
ISL62882, ISL62882B
The ISL62882 is a multiphase PWM buck regulator for
miroprocessor or graphics processor core power supply.
The multiphase buck converter uses interleaved phases
to reduce the total output voltage ripple with each phase
carrying a portion of the total load current, providing
better system performance, superior thermal
management, lower component cost, reduced power
dissipation, and smaller implementation area. The
ISL62882 uses two integrated gate drivers to provide a
complete solution. The PWM modulator is based on
Intersil's Robust Ripple Regulator (R
Compared with traditional modulators, the R
modulator commands variable switching frequency
during load transients, achieving faster transient
response. With the same modulator, the switching
frequency is reduced at light load, increasing the
regulator efficiency.
The ISL62882 can be configured as CPU or graphics
Vcore controller and is fully compliant with IMVP-6.5™
specifications. It responds to PSI# and DPRSLPVR signals
by adding or dropping Phase 2, adjusting overcurrent
protection threshold accordingly, and entering/exiting
diode emulation mode. It reports the regulator output
current through the IMON pin. It senses the current by
using either discrete resistor or inductor DCR whose
variation over temperature can be thermally
compensated by a single NTC thermistor. It uses
differential remote voltage sensing to accurately regulate
the processor die voltage. The unique split LGATE
function further increases light load efficiency. The
adaptive body diode conduction time reduction function
minimizes the body diode conduction loss in diode
emulation mode. User-selectable overshoot reduction
function offers an option to aggressively reduce the
output capacitors as well as the option to disable it for
users concerned about increased system thermal stress.
The ISL62882 offers the FB2 function to optimize
1-phase performance.
The ISL62882B has the same functions as the ISL62882,
but comes in a different package.
March 9, 2011
FN6890.3
1
3
) technology™.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2009-2011. All Rights Reserved
3™
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
Features
• Programmable 1- or 2-Phase CPU Mode Operation or
• Precision Multiphase Core Voltage Regulation
• Microprocessor Voltage Identification Input
• Supports Multiple Current Sensing Methods
• Supports PSI# and DPRSLPVR modes
• Superior Noise Immunity and Transient Response
• Current Monitor and Thermal Monitor
• Differential Remote Voltage Sensing
• High Efficiency Across Entire Load Range
• Programmable 1- or 2-Phase Operation
• Two Integrated Gate Drivers
• Excellent Dynamic Current Balance Between Phases
• Split LGATE1 Drivers Increases Light Load Efficiency
• FB2 Function Optimizes 1-Phase Mode Performance
• Adaptive Body Diode Conduction Time Reduction
• User-selectable Overshoot Reduction Function
• Small Footprint 40 Ld 5x5 or 48 Ld 6x6 TQFN
• Pb-Free (RoHS Compliant)
Applications
• Notebook Core Voltage Regulator
• Notebook GPU Voltage Regulator
1-Phase GPU Mode Operation
- 0.5% System Accuracy Over-Temperature
- Enhanced Load Line Accuracy
- 7-Bit VID Input, 0V to 1.500V in 12.5mV Steps
- Supports VID Changes On-The-Fly
- Lossless Inductor DCR Current Sensing
- Precision Resistor Current Sensing
Packages
All other trademarks mentioned are the property of their respective owners.

Related parts for ISL62882HRTZ

ISL62882HRTZ Summary of contents

Page 1

... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2009-2011. All Rights Reserved Intersil (and design trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ...

Page 2

... Ordering Information PART NUMBER (Notes ISL62882IRTZ 62882 IRTZ ISL62882HRTZ 62882 HRTZ ISL62882BHRTZ 62882 BHRTZ NOTES: 1. Add “-T*” suffix for tape and reel. Please refer to 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...

Page 3

Functional Pin Descriptions ISL62882 ISL62882B SYMBOL - 7 GND 1 2 PGOOD 2 3 PSI RBIAS 4 5 VR_TT NTC COMP FB2 10 13 ISEN2 11 ...

Page 4

Functional Pin Descriptions ISL62882 ISL62882B SYMBOL 24 29 LGATE1b - - LGATE1 25 30 VCCP 26 32 LGATE2 27 33 VSSP2 28 34 PHASE2 29 35 UGATE2 30 36 BOOT2 31 thru 37 38 thru 44 VID0 thru VID6 38 ...

Page 5

Block Diagram VR_ON MODE PSI# CONTROL DPRSLPVR RBIAS VID0 VID1 VID2 DAC AND SOFT- VID3 START VID4 VID5 VID6 Σ RTN FB COMP VW IDROOP FB2 IMON IMON ISUM+ CURRENT SENSE ISUM- 5 ISL62882, ISL62882B VIN VSEN ISEN2 ISEN1 PGOOD ...

Page 6

... Recommended Operating Conditions Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . +5V ±5% Battery Voltage, VIN . . . . . . . . . . . . . . . . . . . +4.5V to 25V Ambient Temperature ISL62882HRTZ, ISL62882BHRTZ . . . . . . -10°C to +100°C ISL62882IRTZ . . . . . . . . . . . . . . . . . . . -40°C to +100°C Junction Temperature ISL62882HRTZ, ISL62882BHRTZ . . . . . . -10°C to +125°C ISL62882IRTZ . . . . . . . . . . . . . . . . . . . -40°C to +125°C = -40°C to +100° SYMBOL TEST CONDITIONS I VR_ON = 3.3V ...

Page 7

Electrical Specifications Operating Conditions: VDD = 5V, T unless otherwise noted. Boldface limits apply over the operating temperature range, -40°C to +100°C. (Continued) PARAMETER CHANNEL FREQUENCY Nominal Channel Frequency Adjustment Range AMPLIFIERS Current-Sense Amplifier Input Offset Error Amp DC Gain ...

Page 8

... A SYMBOL TEST CONDITIONS 2-phase configuration, ISUM- pin current 1-phase configuration, ISUM- pin current One ISEN above another ISEN for >1.2ms UV VSEN falling below setpoint for f >1.2ms V IL(1.0V) V ISL62882HRTZ IH(1.0V) V ISL62882IRTZ IH(1.0V) V IL(1.0V) V IH(1.0V) NTC = 1.3V V (NTC) falling 20mA 4mA OL I CLK_EN ...

Page 9

Gate Driver Timing Diagram PWM t LGFUGR UGATE 1V LGATE ISL62882, ISL62882B UGFLGR FN6890.3 ...

Page 10

Simplified Application Circuits Rbias Rntc o C PGOOD VR_TT# CLK_EN# VID<0:6> PSI# DPRSLPVR VR_ON Rfset Rdroop VCCSENSE VSSSENSE Rimon IMON FIGURE 1. TYPICAL CPU APPLICATION CIRCUIT USING DCR SENSING Rbias RBIAS Rntc NTC o C IMVP6_PWRGD PGOOD VR_TT# VR_TT# CLK_ENABLE ...

Page 11

ISL62882, ISL62882B V+5 V+5 VDD VCCP Rbias RBIAS Rntc NTC o C PGOOD PGOOD VR_TT# VR_TT# CLK_EN# CLK_EN# VID<0:6> VIDs PSI# PSI# DPRSLPVR DPRSLPVR VR_ON VR_ON VW ISL62882 Rfset COMP FB2 FB Rdroop VSEN VCCSENSE VSSSENSE RTN Rimon IMON IMON ...

Page 12

... The ISL62882 is a multiphase regulator implementing ® Intel IMVP-6.5™ protocol. It can be programmed for 1- or 2-phase operation for microprocessor core applications. It uses Intersil patented R Ripple Regulator™) modulator. The R combines the best features of fixed frequency PWM and hysteretic PWM while eliminating many of their Hysteretic shortcomings ...

Page 13

V hits VW, the slave circuit turns off the PWM pulse, Crs and the current source discharges C Since the ISL62882 works with V crs amplitude and noise-free synthesized signals, the ISL62882 achieves lower phase jitter than conventional hysteretic mode ...

Page 14

VDD 5mV/µs VR_ON 2.5mV/µs Vboot 90% 800µs DAC 13 SWITCHING CYCLES CLK_EN# PGOOD FIGURE 10. SOFT-START WAVEFORMS FOR CPU VR APPLICATION VDD VR_ON SLEW VID COMMAND RATE VOLTAGE 90% 120µs DAC 13 SWITCHING CYCLES CLK_EN# PGOOD FIGURE 11. SOFT-START WAVEFORMS ...

Page 15

TABLE 1. VID TABLE (Continued) VID6 VID5 VID4 VID3 VID2 VID1 VID0 ...

Page 16

Rdroop Vdroop FB Idroop E/A Σ COMP DAC VDAC X 1 INTERNAL TO IC FIGURE 12. DIFFERENTIAL SENSING AND LOAD LINE IMPLEMENTATION As the load current increases from zero, the output voltage will droop from the VID table value by ...

Page 17

L2 V2p PHASE2 Rs ISEN2 INTERNAL ISEN1 L1 Cs PHASE1 V1p I FIGURE 14. DIFFERENTIAL-SENSING CURRENT BALANCING CIRCUIT Sometimes difficult to implement symmetrical layout. For the circuit Figure 13 shows, asymmetric ...

Page 18

CCM Switching Frequency The R resistor between the COMP and the VW pins fset sets the VW windows size, therefore sets the switching frequency. When the ISL62882 is in continuous conduction mode (CCM), the switching frequency is not absolutely constant ...

Page 19

Protections The ISL62882 provides overcurrent, current-balance, undervoltage, overvoltage, and over-temperature protections. The ISL62882 determines overcurrent protection (OCP) by comparing the average value of the droop current I with an internal current source threshold. It droop declares OCP when I is ...

Page 20

Current Monitor The ISL62882 provides the current monitor function. The IMON pin outputs a high-speed analog current source that is 3 times of the droop current flowing out of the FB pin. Thus Equation 13: × ...

Page 21

... A good NTC network can limit the output voltage drift to within 2mV recommended to follow the Intersil evaluation value is much smaller than the o . Equations 14 thru 18 describe the ...

Page 22

V (s) also needs to represent real-time I Cn controller to achieve good transient response. Transfer function A (s) has a pole ω and a zero ω cs sns to ...

Page 23

At the beginning capacitance is less because R increases the impedance n of the C branch. As Figure 19 explains, V n.1 when C is too small, and this effect will reduce the V n ring ...

Page 24

... FIGURE 24. VOLTAGE REGULATOR EQUIVALENT Intersil provides a Microsoft Excel-based spreadsheet to help design the compensator and the current sensing network, so the VR achieves constant output impedance as a stable system. Figure 27 shows a screenshot of the spreadsheet. . The voltage across R imon imon × ...

Page 25

A VR with active droop function is a dual-loop system consisting of a voltage loop and a droop loop which is a current loop. However, neither loop alone is sufficient to describe the entire system. The spreadsheet shows two loop ...

Page 26

... Compensation & Current Sensing Network Design for Intersil Multiphase R^3 Regulators for IMVP-6.5 Jia Wei, jwei@intersil.com, 919-405-3605 Attention: 1. "Analysis ToolPak" Add-in is required. To turn on Tools--Add-Ins, and check "Analysis ToolPak". 2. Green cells require user input Operation Parameters Controller Part Number: Phase Number: ...

Page 27

Optional Slew Rate Compensation Circuit For 1-Tick VID Transition Rdroop Rvid Cvid FB Ivid Idroop_vid E/A Σ COMP DAC VDAC X 1 INTERNAL TO IC VID<0:6> Vfb Ivid Vcore Idroop_vid FIGURE 28. OPTIONAL SLEW RATE COMPENSATION CIRCUIT FOR1-TICK VID TRANSITION ...

Page 28

Voltage Regulator Thermal Throttling 54µA 64µA SW1 NTC - + NTC NTC - SW2 R 1.24V s 1.20V FIGURE 29. CIRCUITRY ASSOCIATED WITH THE THERMAL THROTTLING FEATURE OF THE ISL62882 Figure 29 shows the thermal throttling feature ...

Page 29

TABLE 6. LAYOUT CONSIDERATION (Continued) PIN NAME LAYOUT CONSIDERATION 10 ISEN2 A capacitor (C9) decouples it to VSUM-. Place it in general proximity of the controller. 11 ISEN1 A capacitor (C10) decouples it to VSUM-. Place it in general proximity ...

Page 30

VID0 IN VID1 IN VID2 IN VID3 IN VID4 IN VID5 IN VID6 IN D VR_ON IN DPRSLPVR IN +3.3V IN PGOOD OUT +1.1V IN ----- OPTIONAL PGOOD PSI# R16 OPTIONAL RBIAS VR_TT# ---- IN 47.5K VR_TT# ------- ...

Page 31

VID0 IN VID1 IN VID2 IN VID3 IN VID4 IN D VID5 IN VID6 IN VR_ON IN DPRSLPVR IN CLK_EN# OUT R23 +3.3V IN 1.91K PGOOD OUT PSI# IN +1.1V IN PGOOD C PSI# VR_TT# R16 OUT RBIAS ...

Page 32

GPU Application Reference Design Bill of Materials QTY REFERENCE VALUE 1 C11 270pF Multilayer Cap, 16V, 10% 1 C12 330pF Multilayer Cap, 16V, 10% 1 C13 1000pF Multilayer Cap, 16V, 10% 1 C15 0.01µF Multilayer Cap, 16V, 10% 2 ...

Page 33

... Thick Film Chip Resistor, 1% GENERIC Thick Film Chip Resistor, 1% GENERIC Thick Film Chip Resistor, 1% GENERIC (Continued) PART NUMBER PACKAGE H2511-01002-1/16W1 SM0603 H2511-03651-1/16W1 SM0805 H2511-04123-1/16W1 SM0603 ISL62882HRTZ QFN-40 PART NUMBER PACKAGE H1045-00391-16V10 SM0603 H1045-00331-16V10 SM0603 H1045-00102-16V10 SM0603 H1045-00103-16V10 SM0603 H1045-00105-16V20 SM0603 H1045-00334-16V10 ...

Page 34

... Thick Film Chip Resistor, 1% GENERIC IMVP-6.5 PWM Controller INTERSIL (Continued) PART NUMBER PACKAGE H2511-00100-1/16W1 SM0603 H2511-01002-1/16W1 SM0603 H2511-01911-1/16W1 SM0603 H2511-082R5-1/16W1 SM0603 H2511-00R00-1/16W1 SM0603 H2511-01001-1/16W1 SM0603 H2511-01R00-1/16W1 SM0603 H2511-01102-1/16W1 SM0603 H2511-02611-1/16W1 SM0603 ERT-J1VR103J SM0603 H2511-09311-1/16W1 SM0603 H2511-08061-1/16W1 SM0603 H2511-03651-1/16W1 SM0805 H2511-04123-1/16W1 SM0603 ISL62882HRTZ QFN-40 FN6890.3 ...

Page 35

Typical Performance VIN = 12V (A) OUT FIGURE 32. 2-PHASE CCM EFFICIENCY, VID = 1.075V, V ...

Page 36

Typical Performance FIGURE 38. 2-PHASE CPU MODE CLK_EN# DELAY 19V 2A, VID = 1.5V, Ch1 PHASE1, Ch2 Ch4: CLK_EN# O FIGURE 40. STEADY STATE 19V VID = 1.075V, ...

Page 37

Typical Performance FIGURE 44. LOAD TRANSIENT RESPONSE WITH OVERSHOOT REDUCTION FUNCTION DISABLED 19V, VID = 1.075V 15A/50A, di/dt = “FASTEST” O FIGURE 46. 2-PHASE CPU MODE DEEPER SLEEP MODE ENTRY/EXIT, I VID = 1.075V, LFM ...

Page 38

Typical Performance FIGURE 50. TRANSIENT RESPONSE WITH OVERSHOOT REDUCTION FUNCTION ENABLED 19V, VID = 0.95V 12A/51A, di/dt = “FASTEST”, O Ch1: PHASE1, Ch2 LGATE1 1000 900 800 700 600 500 SPEC 400 300 ...

Page 39

Typical Performance FIGURE 56. 1-PHASE GPU MODE VID TRANSITION, DPRSLPVR= 2A, O VID = 1.2375V/1.0375V, Ch2: V Ch3: VID4 39 ISL62882, ISL62882B (Continued) FIGURE 57. 1-PHASE GPU MODE VID TRANSITION DPRSLPVR= 2A, O VID ...

Page 40

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries ...

Page 41

Package Outline Drawing L40.5x5 40 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 1, 9/10 5.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW PACKAGE OUTLINE TYPICAL RECOMMENDED LAND PATTERN 41 ISL62882, ISL62882B A B 40X 0.4± ...

Page 42

Package Outline Drawing L48.6x6 48 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 1, 4/07 6.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 5. 75 TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 42 ISL62882, ...

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