LIS3LV02DQ STMicroelectronics, LIS3LV02DQ Datasheet - Page 30

• Manufacturer Part Number: LIS3LV02DQ
• Description: ACCELEROMETER TRPL AXIS 28QFPN
• Manufacturer: STMicroelectronics

Specifications of LIS3LV02DQ

• Axis: X, Y, Z
• Acceleration Range: ±2g, 6g
• Sensitivity: 1024LSB/g, 340LSB/g
• Voltage - Supply: 2.16 V ~ 3.6 V
• Output Type: Digital
• Bandwidth: 40Hz ~ 2.56kHz Selectable
• Interface: I²C, SPI
• Mounting Type: Surface Mount
• Package / Case: 28-QFN
• Sensing Axis: X, Y, Z
• Acceleration: 2 g, 6 g
• Digital Output - Number Of Bits: 12 bit, 16 bit
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.16 V
• Supply Current: 0.6 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Digital Output - Bus Interface: I2C, SPI
• Body Style: QFPN
• Function: Accelerometer
• Primary Type: Accelerometer
• Range, Measurement: 2/6 g
• Voltage, Supply: 3.6 V
• No. Of Axes: 3
• Ic Interface Type: I2C, SPI
• Sensor Case Style: QFN
• No. Of Pins: 28
• Supply Voltage Range: 2.16V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• For Use With: 497-6249 - BOARD EVAL ACCEL DGTL LIS3LV02DQ497-5069 - EVAL BOARD 3AXIS MEMS ACCELLRMTR
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4919

7 Register Description
7.15
7.16
7.17
7.18
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OUTY_L (2Ah)
In Big Endian Mode (bit BLE CTRL_REG2 set to ‘1’) the content of this register is the MSB
acceleration data and depends by bit DAS in CTR_REG2 reg as described in the following
section.
OUTY_H (2Bh)
When reading the register in “12 bit right justified” mode the most significant bits (15:12) are
replaced with bit 11 (i.e. YD15-YD12=YD11, YD11, YD11, YD11).
In Big Endian Mode (bit BLE CTRL_REG2 set to ‘1’) the content of this register is the LSB
acceleration data.
OUTZ_L (2Ch)
In Big Endian Mode (bit BLE CTRL_REG2 set to ‘1’) the content of this register is the MSB
acceleration data and depends by bit DAS in CTR_REG2 reg as described in the following
section.
OUTZ_H (2Dh)
When reading the register in “12 bit right justified” mode the most significant bits (15:12) are
replaced with bit 11 (i.e. ZD15-ZD12=ZD11, ZD11, ZD11, ZD11).
In Big Endian Mode (bit BLE CTRL_REG2 set to ‘1’) the content of this register is the LSB
acceleration data
YD7, YD0
YD15, YD8
ZD7, ZD0
ZD15, ZD8
Y axis acceleration data LSB
Y axis acceleration data MSB
Z axis acceleration data LSB
Z axis acceleration data MSB
YD15 YD14 YD13 YD12 YD11 YD10
ZD15 ZD14
YD7
ZD7
YD6
ZD6
ZD13 ZD12 ZD11 ZD10
YD5
ZD5
CD00047926
YD4
ZD4
YD3
ZD3
YD2
ZD2
YD1
ZD1
YD9
ZD9
YD0
ZD0
YD8
ZD8
LIS3LV02DQ