HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 276

16BIT MCU FLASH 56K, SMD, LQFP64

HD64F36077GHV

Manufacturer Part Number
HD64F36077GHV
Description
16BIT MCU FLASH 56K, SMD, LQFP64
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64F36077GHV

No. Of I/o's
47
Ram Memory Size
4KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
4.5V
Core Size
16bit
Program Memory Size
56KB
Oscillator Type
External Only
Controller Family/series
H8/300H
Peripherals
ADC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Section 13 Timer Z
13.4.8
Buffer operation differs depending on whether GR has been designated for an input capture
register or an output compare register, or in reset synchronous PWM mode or complementary
PWM mode.
Table 13.8 shows the register combinations used in buffer operation.
Table 13.8 Register Combinations in Buffer Operation
1. When GR is an output compare register
2. When GR is an input capture register
Rev. 1.00 Sep. 16, 2005 Page 246 of 490
REJ09B0216-0100
General Register
GRA
GRB
When a compare match occurs, the value in the buffer register of the corresponding channel is
transferred to the general register.
This operation is illustrated in figure 13.35.
When an input capture occurs, the value in TCNT is transferred to the general register and the
value previously stored in the general register is transferred to the buffer register.
This operation is illustrated in figure 13.36.
Buffer register
Buffer Operation
Figure 13.35 Compare Match Buffer Operation
Buffer Register
GRC
GRD
Compare match signal
General
register
Comparator
TCNT

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