HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 517

• Manufacturer Part Number: HD64F36077GHV
• Description: 16BIT MCU FLASH 56K, SMD, LQFP64
• Manufacturer: Renesas Electronics America

Specifications of HD64F36077GHV

• No. Of I/o's: 47
• Ram Memory Size: 4KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 4.5V
• Core Size: 16bit
• Program Memory Size: 56KB
• Oscillator Type: External Only
• Controller Family/series: H8/300H
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Numerics
14-bit PWM ............................................ 273
A
A/D converter ......................................... 357
Absolute address....................................... 30
Acknowledge .......................................... 338
Address break ........................................... 61
Addressing modes..................................... 29
Arithmetic operations instructions............ 20
Asynchronous mode ............................... 295
Auto-reload timer operation ................... 175
B
Bit manipulation instructions.................... 23
Bit rate .................................................... 288
Bit synchronous circuit ........................... 355
Block data transfer instructions ................ 27
Boot mode .............................................. 109
Boot program.......................................... 109
Branch instructions ................................... 25
Break....................................................... 318
Buffer operation...................................... 246
C
Clock synchronous serial format ............ 346
Clocked synchronous mode .................... 303
Complementary PWM mode .................. 236
Condition field.......................................... 28
Condition-code register (CCR)................. 13
CPU ............................................................ 9
Index
D
Data reading procedure ........................... 169
Data transfer instructions .......................... 19
E
Effective address....................................... 32
Effective address extension....................... 28
Erase/erase-verify ................................... 116
Erasing units ........................................... 103
Error protection....................................... 118
Event counter operation .......................... 175
Exception handling ................................... 43
F
Flash memory ......................................... 103
Framing error .......................................... 299
G
General registers ....................................... 12
H
Hardware protection................................ 118
I
I/O port block diagrams .......................... 459
I/O ports .................................................. 123
I
I
Immediate ................................................. 31
Initial setting procedure .......................... 168
Input capture function ............................. 221
Instruction set............................................ 18
2
2
C bus format ......................................... 337
C bus interface 2 (IIC2)........................ 321
Rev. 1.00 Sep. 16, 2005 Page 487 of 490
REJ09B0216-0100