HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 351

• Manufacturer Part Number: HD64F36077GHV
• Description: 16BIT MCU FLASH 56K, SMD, LQFP64
• Manufacturer: Renesas Electronics America

Specifications of HD64F36077GHV

• No. Of I/o's: 47
• Ram Memory Size: 4KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 4.5V
• Core Size: 16bit
• Program Memory Size: 56KB
• Oscillator Type: External Only
• Controller Family/series: H8/300H
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The I
interface functions. The register configuration that controls the I
Philips configuration, however.
Figure 17.1 shows a block diagram of the I
Figure 17.2 shows an example of I/O pin connections to external circuits.
17.1
• Selection of I
• Continuous transmission/reception
I
• Start and stop conditions generated automatically in master mode
• Selection of acknowledge output levels when receiving
• Automatic loading of acknowledge bit when transmitting
• Bit synchronization/wait function
• Six interrupt sources
• Direct bus drive
Clock synchronous format
• Four interrupt sources
IFIIC10A_000020020200
2
C bus format
Since the shift register, transmit data register, and receive data register are independent from
each other, the continuous transmission/reception can be performed.
In master mode, the state of SCL is monitored per bit, and the timing is synchronized
automatically.
If transmission/reception is not yet possible, set the SCL to low until preparations are
completed.
Transmit data empty (including slave-address match), transmit end, receive data full (including
slave-address match), arbitration lost, NACK detection, and stop condition detection
Two pins, SCL and SDA pins, function as NMOS open-drain outputs when the bus drive
function is selected.
Transmit-data-empty, transmit-end, receive-data-full, and overrun error
2
C bus interface 2 conforms to and provides a subset of the Philips I
Features
2
C format or clock synchronous serial format
Section 17 I
2
C Bus Interface 2 (IIC2)
2
C bus interface 2.
Rev. 1.00 Sep. 16, 2005 Page 321 of 490
2
C bus differs partly from the
Section 17 I
2
C bus (inter-IC bus)
2
C Bus Interface 2 (IIC2)
REJ09B0216-0100