HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 362

• Manufacturer Part Number: HD64F36077GHV
• Description: 16BIT MCU FLASH 56K, SMD, LQFP64
• Manufacturer: Renesas Electronics America

Specifications of HD64F36077GHV

• No. Of I/o's: 47
• Ram Memory Size: 4KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 4.5V
• Core Size: 16bit
• Program Memory Size: 56KB
• Oscillator Type: External Only
• Controller Family/series: H8/300H
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 17 I
17.3.5
ICSR performs confirmation of interrupt request flags and status.
Rev. 1.00 Sep. 16, 2005 Page 332 of 490
REJ09B0216-0100
Bit
2
1
0
Bit
7
Bit Name
ACKE
ACKBR
ACKBT
Bit Name
TDRE
I
2
2
C Bus Status Register (ICSR)
C Bus Interface 2 (IIC2)
Initial
Value
0
0
0
Initial
Value
0
R/W
R/W
R
R/W
R/W
R/W
Description
Acknowledge Bit Judgment Select
0: The value of the receive acknowledge bit is ignored,
1: If the receive acknowledge bit is 1, continuous transfer
Receive Acknowledge
In transmit mode, this bit stores the acknowledge data
that are returned by the receive device. This bit cannot be
modified.
0: Receive acknowledge = 0
1: Receive acknowledge = 1
Transmit Acknowledge
In receive mode, this bit specifies the bit to be sent at the
acknowledge timing.
0: 0 is sent at the acknowledge timing.
1: 1 is sent at the acknowledge timing.
Description
Transmit Data Register Empty
[Setting conditions]
•
•
•
•
[Clearing conditions]
•
•
and continuous transfer is performed.
is halted.
When data is transferred from ICDRT to ICDRS and
ICDRT becomes empty
When TRS is set
When a start condition (including re-transfer) has
been issued
When transmit mode is entered from receive mode in
slave mode
When 0 is written in TDRE after reading TDRE = 1
When data is written to ICDRT with an instruction