XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 245

IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112

XC68HC12A0CPV8

Manufacturer Part Number
XC68HC12A0CPV8
Description
IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of XC68HC12A0CPV8

Controller Family/series
68HC12
No. Of I/o's
68
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
1
Core Size
16 Bit
Program Memory Size
60KB
Peripherals
ADC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PAFLG — Pulse Accumulator A Flag Register
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
RESET:
BIT 7
0
0
6
0
0
CLK1, CLK0 — Clock Select Bits
PAOVI — Pulse Accumulator A Overflow Interrupt enable
PAI — Pulse Accumulator Input Interrupt enable
Read or write anytime. When the TFFCA bit in the TSCR register is set,
any access to the PACNT register will clear all the flags in the PAFLG
register.
PAOVF — Pulse Accumulator A Overflow Flag
If the timer is not active (TEN = 0 in TSCR), there is no divide-by-64
since the E÷64 clock is generated by the timer prescaler.
If the pulse accumulator is disabled (PAEN = 0), the prescaler clock
from the timer is always used as an input clock to the timer counter.
The change from one selected clock to the other happens
immediately after these bits are written.
Set when the 16-bit pulse accumulator A overflows from $FFFF to
$0000,or when 8-bit pulse accumulator 3 (PAC3) overflows from $FF
to $00.
0 = interrupt inhibited
1 = interrupt requested if PAOVF is set
0 = interrupt inhibited
1 = interrupt requested if PAIF is set
CLK1
0
0
1
1
5
0
0
Enhanced Capture Timer
CLK0
0
1
0
1
4
0
0
Use timer prescaler clock as timer counter clock
Use PACLK as input to timer counter clock
Use PACLK/256 as timer counter clock frequency
Use PACLK/65536 as timer counter clock frequency
3
0
0
2
0
0
Clock Source
PAOVF
1
0
Enhanced Capture Timer
BIT 0
PAIF
0
Timer Registers
Technical Data
$00A1
245

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