XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 384

• Manufacturer Part Number: XC68HC12A0CPV8
• Description: IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
• Manufacturer: Freescale Semiconductor

Specifications of XC68HC12A0CPV8

• Controller Family/series: 68HC12
• No. Of I/o's: 68
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Core Size: 16 Bit
• Program Memory Size: 60KB
• Peripherals: ADC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Development Support
Technical Data
384
1. Use these commands only for reading/writing to BDM locations
WRITE_BD_WORD
READ_BD_WORD
WRITE_BD_BYTE
READ_BD_BYTE
mally in the HC12 MCU memory map
memory map, there needs to be a way to decide which physical locations are being accessed by the hardware BDM
commands
normal application locations
the access cycles of the READ_BD and WRITE_BD commands
access the BDM locations even if the application program is running out of the same memory area in the normal appli-
cation memory map
BACKGROUND
WRITE_WORD
READ_WORD
WRITE_BYTE
READ_BYTE
Command
.
This gives rise to needing separate memory access commands for the BDM locations as opposed to the
(1)
(1)
(1)
(1)
.
The second type of BDM commands are firmware commands
implemented in a small ROM within the HC12 MCU. The CPU must be
in background mode to execute firmware commands. The usual way to
get to background mode is by the hardware command BACKGROUND.
The BDM ROM is located at $FF20 to $FFFF while BDM is active. There
are also seven bytes of BDM registers located at $FF00 to $FF06 when
BDM is active. The CPU executes code in the BDM firmware to perform
the requested operation. The BDM firmware watches for serial
commands and executes them as they are received. The firmware
commands are shown in
.
Opcode
In logic, this is accomplished by momentarily enabling the BDM memory resources, just for
(Hex)
CC
EC
C4
C0
C8
E4
E0
E8
90
Table 19-2. Hardware Commands
.
Since these locations have the same addresses as some of the normal application
16-bit data out
16-bit data out
16-bit data out
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit data out
16-bit data in
16-bit data in
16-bit data in
16-bit data in
Development Support
None
Data
Table
Enter background mode if firmware enabled.
Read from memory with BDM in map (may steal
Read from memory with BDM in map (may steal
Read from memory with BDM out of map (may steal
Read from memory with BDM out of map (may steal
Write to memory with BDM in map (may steal cycles
Write to memory with BDM in map (may steal cycles
Write to memory with BDM out of map (may steal
Write to memory with BDM out of map (may steal
.
The BDM firmware ROM and BDM registers are not nor-
.
cycles if external access) data for odd address on
low byte, data for even address on high byte.
cycles if external access). Must be aligned access.
cycles if external access) data for odd address on
low byte, data for even address on high byte.
cycles if external access). Must be aligned access.
if external access) data for odd address on low
byte, data for even address on high byte.
if external access). Must be aligned access.
cycles if external access) data for odd address on
low byte, data for even address on high byte.
cycles if external access). Must be aligned access.
This logic allows the debugging system to unobtrusively
19-3.
(1)
Description
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor