P89LPC916FDH NXP Semiconductors, P89LPC916FDH Datasheet - Page 45

• Manufacturer Part Number: P89LPC916FDH
• Description: MCU 8BIT 80C51 2K FLASH, TSSOP16
• Manufacturer: NXP Semiconductors

Specifications of P89LPC916FDH

• Controller Family/series: (8051) 8052
• Core Size: 8bit
• No. Of I/o's: 14
• Program Memory Size: 2KB
• Ram Memory Size: 256Byte
• Cpu Speed: 18MHz
• Oscillator Type: Internal Only
• No. Of Timers: 4
• Digital Ic: RoHS Compliant

NXP Semiconductors
P89LPC915_916_917_5
Product data sheet
Fig 16. SPI block diagram
SPI STATUS REGISTER
BY 4, 16, 64, 128
CPU clock
DIVIDER
SELECT
SPI CONTROL
8.21 SPI
The P89LPC916 provides another high-speed serial communication interface—the SPI
interface. SPI is a full-duplex, high-speed, synchronous communication bus with two
operation modes: Master mode and Slave mode. Up to 4.5 Mbit/s can be supported in
Master mode or up to 3 Mbit/s in Slave mode. It has a Transfer Completion Flag and Write
Collision Flag Protection.
The SPI interface has four pins: SPICLK, MOSI, MISO and SS:
Typical connections are shown in
•
•
SPICLK, MOSI and MISO are typically tied together between two or more SPI
devices. Data flows from master to slave on MOSI (Master Out Slave In) pin and flows
from slave to master on MISO (Master In Slave Out) pin. The SPICLK signal is output
in the master mode and is input in the slave mode. If the SPI system is disabled, i.e.,
SPEN (SPCTL.6) = 0 (reset value), these pins are configured for port functions.
SS is the optional slave select pin. In a typical configuration, an SPI master asserts
one of its port pins to select one SPI device as the current slave. An SPI slave device
uses its SS pin to determine whether it is selected.
interrupt
request
SPI clock (master)
SPI
MSTR
SPEN
Rev. 05 — 15 December 2009
internal
data
8-bit microcontrollers with accelerated two-clock 80C51 core
bus
SPI CONTROL REGISTER
8-BIT SHIFT REGISTER
READ DATA BUFFER
CLOCK LOGIC
Figure 17
clock
through
P89LPC915/916/917
Figure
19.
M
M
M
S
S
S
CONTROL
LOGIC
PIN
© NXP B.V. 2009. All rights reserved.
002aaa900
MISO
P2.3
MOSI
P2.2
SPICLK
P2.5
SS
P2.4
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