PIC16F876A-E/SS Microchip Technology, PIC16F876A-E/SS Datasheet - Page 278

• Manufacturer Part Number: PIC16F876A-E/SS
• Description: 28 PIN, 14KB ENH FLASH, 368 RAM, 22 I/O,
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F876A-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SSOP
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PICmicro MID-RANGE MCU FAMILY
17.1
SPI is a trademark of Motorola Corporation.
I
DS31017A-page 17-2
2
C is a trademark of Philips Corporation.
Introduction
The Master Synchronous Serial Port (MSSP) module is a serial interface useful for communicat-
ing with other peripheral or microcontroller devices. These peripheral devices may be serial
EEPROMs, shift registers, display drivers, A/D converters, etc. The MSSP module can operate
in one of two modes:
• Serial Peripheral Interface (SPI™)
• Inter-Integrated Circuit (I
Figure 17-1
the block diagrams for the two different I
Figure 17-1:
- Full Master Mode
- Slave mode (with general address call)
shows a block diagram for the SPI mode, while
SPI Mode Block Diagram
SDO
SCK
SDI
SS
2
C™)
Preliminary
Read
SS Control
SMP:CKE
Select
Edge
Enable
bit0
Select
2
Edge
C modes of operation.
SSPBUF reg
Data to TX/RX in SSPSR
TRIS bit
2
SSPM3:SSPM0
SSPSR reg
Clock Select
4
2
shift clock
Prescaler
Write
4, 16, 64
Figure
TMR2 output
data bus
Internal
2
1997 Microchip Technology Inc.
17-2, and
T
OSC
Figure 17-3
show