PIC16F876A-E/SS Microchip Technology, PIC16F876A-E/SS Datasheet - Page 91

• Manufacturer Part Number: PIC16F876A-E/SS
• Description: 28 PIN, 14KB ENH FLASH, 368 RAM, 22 I/O,
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F876A-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SSOP
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.8
1997 Microchip Technology Inc.
PCON Register
bit 7
bit 6:3
bit 2
bit 1
bit 0
The Power Control (PCON) register contains flag bit(s), that together with the TO and PD bits,
allows the user to differentiate between the device resets.
Register 5-3: PCON Register
bit 7
MPEEN: Memory Parity Error Circuitry Status bit
This bit reflects the value of the MPEEN configuration bit.
Unimplemented: Read as '0'
PER: Memory Parity Error Reset Status bit
1 = No error occurred
0 = A program memory fetch parity error occurred
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = No Brown-out Reset occurred
0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
MPEEN
Note 1: BOR is unknown on Power-on Reset. It must then be set by the user and checked
Note 2: It is recommended that the POR bit be cleared after a power-on reset has been
(must be set in software after a Power-on Reset occurs)
R-u
on subsequent resets to see if BOR is clear, indicating a brown-out has occurred.
The BOR status bit is a don't care and is not necessarily predictable if the brown-out
circuit is disabled (by clearing the BODEN bit in the Configuration word).
detected, so that subsequent power-on resets may be detected.
U-0
—
W = Writable bit
U-0
—
Section 5. CPU and ALU
U-0
—
- n = Value at POR reset
U-0
—
R/W-0
PER
R/W-0
POR
DS31005A-page 5-9
bit 0
R/W-0
BOR
5