PIC16F876A-E/SS Microchip Technology, PIC16F876A-E/SS Datasheet - Page 444

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PIC16F876A-E/SS

Manufacturer Part Number
PIC16F876A-E/SS
Description
28 PIN, 14KB ENH FLASH, 368 RAM, 22 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F876A-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PICmicro MID-RANGE MCU FAMILY
24.1
DS31024A-page 24-2
AN15
AN14
AN13
AN12
AN11
(SLPCON<0>)
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
Note 3
ADOFF
Bandgap Ref.
OSC1
Oscillator
AN0
Internal
SREFLO
CDAC
Introduction
SREFHI
C
(Configuration Bit)
~2.5uA~5uA~10uA~20uA
FOSC
0
1
The components required to create a Slope A/D converter include:
• Precision comparator
• 4-bit programmable current source
• 16-channel analog MUX
• 16-bit timer with capture register
This section will discuss using these components for a Slope A/D.
Each analog input channel is multiplexed to a single analog input source to be converted by
means of a slope conversion method (using a single precision comparator). The programmable
current source feeds an external capacitor to generate the ramp voltage used in the conversion.
Figure 24-1: Slope A/D Block Diagram
ADCON0<7:4>
~100
14
12
11
15
13
10
9
8
7
6
5
4
3
2
1
0
ADCON1<7:4>
4-Bit Current DAC (Note 1)
(ADCON0<2>)
Analog
MUX
~ 1 k
4
AMUXOE
ADRST (ADCON0<1>)
ADOFF
ADRST
Note 2
ADOFF
Slope A/D
Capture Interrupt (ADCIF)
Clock
Logic
Stop
Slope A/D Capture
Note 1: All current sources are disabled if ADRST = ‘1’
ADTMRH
ADCAPH
2: Approximately 3.5 microsecond time constant
3: Dependent on A/D resolution and input voltage
range (see
ADTMRL
ADCAPL
Table
24-2)
Overflow
1997 Microchip Technology Inc.
Timer
Internal
Data
Bus

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