CY8C3244LTI-123 Cypress Semiconductor Corp, CY8C3244LTI-123 Datasheet - Page 102

• Manufacturer Part Number: CY8C3244LTI-123
• Description: CY8C3244LTI-123
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ 3 CY8C32xxr

Specifications of CY8C3244LTI-123

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: CapSense, DMA, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 5.5 V
• Data Converters: A/D 2x12b, D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Technology: CMOS
• Processing Unit: Microcontroller
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Package Type: QFN EP
• Screening Level: Industrial
• Pin Count: 48
• Mounting: Surface Mount
• Rad Hardened: No
• Processor Series: CY8C32
• Core: 8051
• Data Bus Width: 32 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART, USB
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 29
• Number Of Timers: 4
• Operating Supply Voltage: 1.71 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Controller Family/series: (8051) PSOC 3
• No. Of I/o's: 25
• Eeprom Memory Size: 0.5KB
• Ram Memory Size: 2KB
• Cpu Speed: 50MHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.5.5 SWD Interface
Table 11-62. SWD Interface AC Specifications
11.5.6 SWV Interface
Table 11-63. SWV Interface AC Specifications
11.6 Clocking
Specifications are valid for –40 °C ≤ T
except where noted.
11.6.1 32 kHz External Crystal
Table 11-64. 32 kHz External Crystal DC Specifications
Table 11-65. 32 kHz External Crystal AC Specifications
Document Number: 001-56955 Rev. *J
f_SWDCK
T_SWDI_setup SWDIO input setup before SWDCK high T = 1/f_SWDCK max
T_SWDI_hold
T_SWDO_valid SWDCK high to SWDIO output
T_SWDO_hold SWDIO output hold after SWDCK low
I
CL
DL
F
T
Parameter
Parameter
Notes
CC
48. Based on device characterization (Not production tested).
49. f_SWDCK must also be no more than 1/3 CPU clock frequency.
ON
Parameter
Parameter
Operating current
External crystal capacitance
Drive level
Frequency
Startup time
(PSoC 3 reading on SWDIO)
(PSoC 3 writing to SWDIO)
SWDCLK frequency
SWV mode SWV bit rate
SWDIO input hold after SWDCK high
SWDCK
SWDIO
SWDIO
Description
Description
Description
Description
A
≤ 85 °C and T
T_SWDI_setup
Figure 11-56. SWD Interface Timing
[22]
[48]
J
Low-power mode
High power mode
≤ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,
T_SWDI_hold
3.3 V ≤ V
1.71 V ≤ V
1.71 V ≤ V
SWD over USBIO pins
T = 1/f_SWDCK max
T = 1/f_SWDCK max
T = 1/f_SWDCK max
[22]
Conditions
Conditions
DDD
DDD
DDD
Conditions
Conditions
≤ 5 V
< 3.3 V
< 3.3 V,
T_SWDO_valid
(1/f_SWDCK)
PSoC
Min
Min
–
–
–
–
–
Min
Min
T/4
T/4
T/4
®
–
–
–
–
–
T_SWDO_hold
3: CY8C32 Family
32.768
0.25
Typ
Typ
6
–
1
Typ
Typ
–
–
–
–
–
–
–
–
Data Sheet
Max
Max
1.0
5.5
14
–
1
–
–
2T/5
Max
7
Page 102 of 119
Max
[49]
–
–
–
33
[49]
[49]
Units
Units
Units
Units
kHz
MHz
MHz
MHz
µW
Mbit
µA
pF
s
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