CY8C3244LTI-123 Cypress Semiconductor Corp, CY8C3244LTI-123 Datasheet - Page 113

• Manufacturer Part Number: CY8C3244LTI-123
• Description: CY8C3244LTI-123
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ 3 CY8C32xxr

Specifications of CY8C3244LTI-123

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: CapSense, DMA, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 5.5 V
• Data Converters: A/D 2x12b, D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Technology: CMOS
• Processing Unit: Microcontroller
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Package Type: QFN EP
• Screening Level: Industrial
• Pin Count: 48
• Mounting: Surface Mount
• Rad Hardened: No
• Processor Series: CY8C32
• Core: 8051
• Data Bus Width: 32 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART, USB
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 29
• Number Of Timers: 4
• Operating Supply Voltage: 1.71 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Controller Family/series: (8051) PSOC 3
• No. Of I/o's: 25
• Eeprom Memory Size: 0.5KB
• Ram Memory Size: 2KB
• Cpu Speed: 50MHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 14-1. Acronyms Used in this Document (continued)
Document Number: 001-56955 Rev. *J
PHUB
PHY
PICU
PLA
PLD
PLL
PMDD
POR
PRES
PRS
PS
PSoC
PSRR
PWM
RAM
RISC
RMS
RTC
RTL
RTR
RX
SAR
SC/CT
SCL
SDA
S/H
SINAD
SIO
SOC
Acronym
®
peripheral hub
physical layer
port interrupt control unit
programmable logic array
programmable logic device, see also PAL
phase-locked loop
package material declaration datasheet
power-on reset
precise power-on reset
pseudo random sequence
port read data register
Programmable System-on-Chip™
power supply rejection ratio
pulse-width modulator
random-access memory
reduced-instruction-set computing
root-mean-square
real-time clock
register transfer language
remote transmission request
receive
successive approximation register
switched capacitor/continuous time
I
I
sample and hold
signal to noise and distortion ratio
special input/output, GPIO with advanced
features. See GPIO.
start of conversion
2
2
C serial clock
C serial data
Description
Table 14-1. Acronyms Used in this Document (continued)
15. Reference Documents
PSoC® 3, PSoC® 5 Architecture TRM
PSoC® 3 Registers TRM
SOF
SPI
SR
SRAM
SRES
SWD
SWV
TD
THD
TIA
TRM
TTL
TX
UART
UDB
USB
USBIO
VDAC
WDT
WOL
WRES
XRES
XTAL
Acronym
start of frame
Serial Peripheral Interface, a communications
protocol
slew rate
static random access memory
software reset
serial wire debug, a test protocol
single-wire viewer
transaction descriptor, see also DMA
total harmonic distortion
transimpedance amplifier
technical reference manual
transistor-transistor logic
transmit
Universal Asynchronous Transmitter Receiver, a
communications protocol
universal digital block
Universal Serial Bus
USB input/output, PSoC pins used to connect to
a USB port
voltage DAC, see also DAC, IDAC
watchdog timer
write once latch, see also NVL
watchdog timer reset
external reset I/O pin
crystal
PSoC
®
3: CY8C32 Family
Description
Data Sheet
Page 113 of 119
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